152e5a03a1
When CONFIG_LP_TIMER_RDTSC is enabled honor the TSC information
exported in the coreboot tables as the cpu_khz frequency. That
allows get_cpu_speed() not to be called which currently relies
on the 8254 PIT. As certain x86 platforms allow that device
to be optional or turned off for power saving reasons, allow
a path where get_cpu_speed() is no longer called. Additionally,
this approach also allows the libpayload to not duplicate logic
that already exists in coreboot.
BUG=chrome-os-partner:50214
BRANCH=glados
TEST=Confirmed in payload TSC frequency is honored instead of
using get_cpu_speed().
Change-Id: Ib8993afdfb49065d43de705d6dbbdb9174b6f2c4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13671
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
84 lines
2.8 KiB
C
84 lines
2.8 KiB
C
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <libpayload-config.h>
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#include <libpayload.h>
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#include <coreboot_tables.h>
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#include <multiboot_tables.h>
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#define CPU_KHZ_DEFAULT 200
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/**
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* This is a global structure that is used through the library - we set it
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* up initially with some dummy values - hopefully they will be overridden.
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*/
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struct sysinfo_t lib_sysinfo = {
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.cpu_khz = CPU_KHZ_DEFAULT,
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#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE)
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.ser_ioport = CONFIG_LP_SERIAL_IOBASE,
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#else
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.ser_ioport = 0x3f8,
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#endif
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};
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int lib_get_sysinfo(void)
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{
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int ret;
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#if IS_ENABLED(CONFIG_LP_MULTIBOOT)
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/* Get the information from the multiboot tables,
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* if they exist */
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get_multiboot_info(&lib_sysinfo);
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#endif
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/* Get information from the coreboot tables,
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* if they exist */
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ret = get_coreboot_info(&lib_sysinfo);
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/* Get the CPU speed (for delays) if not set from the default value. */
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if (lib_sysinfo.cpu_khz == CPU_KHZ_DEFAULT)
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lib_sysinfo.cpu_khz = get_cpu_speed();
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if (!lib_sysinfo.n_memranges) {
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/* If we can't get a good memory range, use the default. */
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lib_sysinfo.n_memranges = 2;
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lib_sysinfo.memrange[0].base = 0;
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lib_sysinfo.memrange[0].size = 640 * 1024;
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lib_sysinfo.memrange[0].type = CB_MEM_RAM;
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lib_sysinfo.memrange[1].base = 1024 * 1024;
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lib_sysinfo.memrange[1].size = 31 * 1024 * 1024;
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lib_sysinfo.memrange[1].type = CB_MEM_RAM;
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}
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return ret;
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}
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