Uwe Hermann 0702469f16 Fix up and generalize the ITE IT8708F code. It was only working out of
pure luck (and broken code elsewhere). Needs some more fixing.

Add more LDN descriptions to various Super I/Os.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 22:13:48 +00:00

168 lines
5.2 KiB
C

/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "superiotool.h"
#define DEVICE_ID_REG 0x20
#define DEVICE_REV_REG 0x21
/**
* The ID entries must be in 0xYYZ format, where YY is the device ID,
* and Z is bits 7..4 of the device revision register. We do not match
* bits 3..0 of the device revision here.
*/
const static struct superio_registers reg_table[] = {
{0x601, "W83697HF/F", {
{NOLDN, NULL,
{0x07,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,
0x2a,EOT},
{NANA,0x60,NANA,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
MISC,EOT}},
/* Some register defaults depend on the value of PNPCSV. */
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
0x00,EOT}},
{0x1, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
{0x2, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x3, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
{0x6, "Consumer IR",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x7, "Game port, GPIO 1",
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
{0x00,0x02,0x01,0x00,0x00,0xff,0x00,0x00,EOT}},
{0x8, "MIDI port, GPIO 5",
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
0xf4,0xf5,EOT},
{0x00,0x03,0x30,0x00,0x00,0x09,0xff,0x00,0x00,0x00,
0x00,0x00,EOT}},
{0x9, "GPIO 2, GPIO 3, GPIO 4",
{0x30,0x60,0x61,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
0xf7,0xf8,0xf5,EOT},
{0x00,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,
0x00,0x00,0x00,EOT}},
{0xa, "ACPI",
{0x30,0x70,0xe0,0xe1,0xe2,0xe5,0xe6,0xe7,
0xf0,0xf1,0xf3,0xf4,0xf6,0xf7,0xf9,EOT},
{0x00,0x00,0x00,0x00,NANA,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
{0xb, "Hardware monitor",
{0x30,0x60,0x61,0x70,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{EOT}}},
{0x886, "W83627EHF/EF/EHG/EG", {
{NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
{0x88,MISC,0xff,0x00,MISC,0x00,MISC,RSVD,0x50,
0x04,0x00,RSVD,0x00,0x21,0x00,0x00,EOT}},
{0x0, "Floppy",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
0xf5,EOT},
{0x01,0x03,0xf0,0x06,0x02,0x8e,0x00,0xff,0x00,
0x00,EOT}},
{0x1, "Parallel port",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
{0x2, "COM1",
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x01,0x03,0xf8,0x04,0x00,EOT}},
{0x3, "COM2",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
{0x5, "Keyboard",
{0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT},
{0x01,0x00,0x60,0x00,0x64,0x01,0x0c,0x83,EOT}},
{0x6, "Serial flash interface",
{0x30,0x62,0x63,EOT},
{0x00,0x00,0x00,EOT}},
{0x7, "GPIO 1, GPIO 6, game port, MIDI port",
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
0xf4,0xf5,0xf6,0xf7,EOT},
{0x00,0x02,0x01,0x03,0x30,0x09,0xff,0x00,0x00,0x00,
0xff,0x00,0x00,0x00,EOT}},
{0x8, "WDTO#, PLED",
{0x30,0xf5,0xf6,0xf7,EOT},
{0x00,0x00,0x00,0x00,EOT}},
{0x9, "GPIO 2, GPIO 3, GPIO 4, GPIO 5, SUSLED",
{0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xf0,0xf1,0xf2,
0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
{0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,
0x00,0xff,0x00,0x00,0x00,EOT}},
{0xa, "ACPI",
{0x30,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,
0xe8,0xf2,0xf3,0xf4,0xf6,0xf7,EOT},
{0x00,0x00,0x01,0x00,0xff,0x08,0x00,RSVD,0x00,0x00,
RSVD,0x7c,0x00,0x00,0x00,0x00,EOT}},
{0xb, "Hardware monitor",
{0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
{0x00,0x00,0x00,0x00,0xc1,0x00,EOT}},
{EOT}}},
{EOT}
};
static void enter_conf_mode_winbond(uint16_t port)
{
outb(0x87, port);
outb(0x87, port);
}
static void exit_conf_mode_winbond(uint16_t port)
{
outb(0xaa, port);
}
void probe_idregs_winbond(uint16_t port)
{
uint16_t id;
uint8_t devid, rev;
enter_conf_mode_winbond(port);
devid = regval(port, DEVICE_ID_REG);
rev = regval(port, DEVICE_REV_REG);
/* Bits 3..0 of 'rev' form the IC version, we don't match that. */
id = (devid << 4) | ((rev & 0xf0) >> 4);
if (superio_unknown(reg_table, id)) {
no_superio_found(port);
exit_conf_mode_winbond(port);
return;
}
printf("Found Winbond %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
get_superio_name(reg_table, id), devid, rev, port);
/* TODO: Special notes in dump output for the MISC entries. */
dump_superio("Winbond", reg_table, port, id);
exit_conf_mode_winbond(port);
}