0759346cd6
This patch modifies flash layout to add ME_RW_A/B to add
the CSE RW blob and also enable the CSE RW update feature for
JSLRVP
BUG=b:169077783
TEST= Built for jslrvp. Verified that CSE RW and metadata files
are included in cbfs.
Change-Id: I13baa317a06d00cec0337f08754892c7c8737f5d
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
46 lines
1.1 KiB
Plaintext
46 lines
1.1 KiB
Plaintext
FLASH@0xff000000 0x1000000 {
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SI_ALL@0x0 0x600000 {
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SI_DESC@0x0 0x1000
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SI_EC@0x1000 0x80000
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SI_ME@0x81000 0x57F000
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}
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SI_BIOS@0x600000 0xA00000 {
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RW_SECTION_A@0x0 0x2d0000 {
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VBLOCK_A@0x0 0x10000
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FW_MAIN_A(CBFS)@0x10000 0x12ffc0
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RW_FWID_A@0x13ffc0 0x40
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ME_RW_A(CBFS)@0x140000 0x190000
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}
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RW_SECTION_B@0x2d0000 0x2d0000 {
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VBLOCK_B@0x0 0x10000
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FW_MAIN_B(CBFS)@0x10000 0x12ffc0
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RW_FWID_B@0x13ffc0 0x40
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ME_RW_B(CBFS)@0x140000 0x190000
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}
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RW_MISC@0x5a0000 0x30000 {
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UNIFIED_MRC_CACHE@0x0 0x20000 {
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RECOVERY_MRC_CACHE@0x0 0x10000
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RW_MRC_CACHE@0x10000 0x10000
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}
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RW_ELOG(PRESERVE)@0x20000 0x4000
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RW_SHARED@0x24000 0x4000 {
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SHARED_DATA@0x0 0x2000
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VBLOCK_DEV@0x2000 0x2000
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}
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RW_VPD(PRESERVE)@0x28000 0x2000
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RW_NVRAM(PRESERVE)@0x2a000 0x6000
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}
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RW_LEGACY(CBFS)@0x5d0000 0x30000
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WP_RO@0x600000 0x400000 {
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RO_VPD(PRESERVE)@0x0 0x4000
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RO_SECTION@0x4000 0x3fc000 {
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FMAP@0x0 0x800
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RO_FRID@0x800 0x40
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RO_FRID_PAD@0x840 0x7c0
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GBB@0x1000 0x3000
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COREBOOT(CBFS)@0x4000 0x3f8000
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}
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}
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}
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}
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