03353de80b
- GCC gets updated from 5.2.0 to 6.3.0: gcc-6.3.0_riscv.patch is a diff between 5fcb8c4 and 173684b in riscv-gcc, and it needs gcc-6.3.0_memmodel.patch. - Binutils goes from 2.26.1 to 2.28: There is a build error for MIPS gold so I add patch for it. - GMP gets a bump from 6.1.0 to 6.1.2 - MPFR is updated from 3.1.4 to 3.1.5 - GDB is upgraded from 6.1.1 to 6.1.2 - IASL is changed from 20160831 to 20161222 - LLVM is changed from 3.8.0 to 3.9.1 Change-Id: I20fea838d798c430d8c4d2cc6b07614d967c60c5 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/17189 Tested-by: build bot (Jenkins)
18 lines
649 B
Diff
18 lines
649 B
Diff
diff -urN gcc-6.1.0.orig/gcc/config/nds32/nds32.md gcc-6.1.0/gcc/config/nds32/nds32.md
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--- gcc-6.1.0.orig/gcc/config/nds32/nds32.md 2015-01-15 22:45:09.000000000 -0800
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+++ gcc-6.1.0/gcc/config/nds32/nds32.md 2016-04-14 22:09:09.000000000 -0700
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@@ -2289,11 +2289,11 @@
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emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[2],
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operands[4]));
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- operands[5] = gen_reg_rtx (SImode);
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+ rtx tmp = gen_reg_rtx (SImode);
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/* Step C, D, E, and F, using another temporary register operands[5]. */
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emit_jump_insn (gen_casesi_internal (operands[0],
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operands[3],
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- operands[5]));
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+ tmp));
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DONE;
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})
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