We do not need to set the CS (Command Stop) bit in the Command Ring Control Register. CS is implied by CA (Command Abort). I'm not sure if there is a defined execution order for these command bits, so it's safer to only use the CA bit as it includes the CS function. Ref: xHCI spec 1.2 (May 2019), Section 5.4.5, Table 5-24. BUG=b:160354585,b:157123390 TEST=able to boot into recovery using USB stick on servo v2 on volteer as well as HooToo 8-1 hub Change-Id: Iaeba98b6da8da49f529358ca6d68270440ea0f42 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44876 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
		
			
				
	
	
		
			212 lines
		
	
	
		
			5.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			212 lines
		
	
	
		
			5.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *
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|  * Copyright (C) 2013 secunet Security Networks AG
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions
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|  * are met:
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|  * 1. Redistributions of source code must retain the above copyright
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|  *    notice, this list of conditions and the following disclaimer.
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|  * 2. Redistributions in binary form must reproduce the above copyright
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|  *    notice, this list of conditions and the following disclaimer in the
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|  *    documentation and/or other materials provided with the distribution.
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|  * 3. The name of the author may not be used to endorse or promote products
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|  *    derived from this software without specific prior written permission.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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|  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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|  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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|  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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|  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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|  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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|  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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|  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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|  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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|  * SUCH DAMAGE.
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|  */
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| 
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| #include <inttypes.h>
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| #include <arch/virtual.h>
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| #include "xhci_private.h"
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| 
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| trb_t *
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| xhci_next_command_trb(xhci_t *const xhci)
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| {
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| 	xhci_clear_trb(xhci->cr.cur, xhci->cr.pcs);
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| 	return xhci->cr.cur;
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| }
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| 
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| void
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| xhci_post_command(xhci_t *const xhci)
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| {
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| 	xhci_debug("Command %d (@%p)\n",
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| 		   TRB_GET(TT, xhci->cr.cur), xhci->cr.cur);
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| 
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| 	TRB_SET(C, xhci->cr.cur, xhci->cr.pcs);
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| 	++xhci->cr.cur;
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| 
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| 	/* pass command trb to hardware */
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| 	wmb();
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| 	/* Ring the doorbell */
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| 	xhci->dbreg[0] = 0;
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| 
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| 	while (TRB_GET(TT, xhci->cr.cur) == TRB_LINK) {
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| 		xhci_debug("Handling LINK pointer (@%p)\n", xhci->cr.cur);
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| 		const int tc = TRB_GET(TC, xhci->cr.cur);
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| 		TRB_SET(C, xhci->cr.cur, xhci->cr.pcs);
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| 		xhci->cr.cur = phys_to_virt(xhci->cr.cur->ptr_low);
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| 		if (tc)
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| 			xhci->cr.pcs ^= 1;
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| 	}
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| }
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| 
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| static int
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| xhci_wait_for_command(xhci_t *const xhci,
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| 		      const trb_t *const cmd_trb,
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| 		      const int clear_event)
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| {
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| 	int cc;
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| 
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| 	cc = xhci_wait_for_command_done(xhci, cmd_trb, clear_event);
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| 	if (cc != TIMEOUT)
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| 		return cc;
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| 
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| 	/* Abort command on timeout */
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| 	xhci_debug("Aborting command (@%p), CRCR: 0x%"PRIx32"\n",
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| 		   cmd_trb, xhci->opreg->crcr_lo);
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| 	/*
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| 	 * Ref. xHCI Specification Revision 1.2, May 2019.
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| 	 * Section 5.4.5, Table 5-24.
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| 	 *
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| 	 * Abort the command and stop the ring.
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| 	 */
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| 	xhci->opreg->crcr_lo |= CRCR_CA;
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| 	xhci->opreg->crcr_hi = 0;
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| 	cc = xhci_wait_for_command_aborted(xhci, cmd_trb);
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| 
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| 	if (xhci->opreg->crcr_lo & CRCR_CRR)
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| 		fatal("xhci_wait_for_command: Command ring still running\n");
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| 
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| 	return cc;
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| }
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| 
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| /*
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|  * xhci_cmd_* return >= 0: xhci completion code (cc)
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|  *		      < 0: driver error code
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|  */
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| 
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| int
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| xhci_cmd_enable_slot(xhci_t *const xhci, int *const slot_id)
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| {
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| 	trb_t *const cmd = xhci_next_command_trb(xhci);
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| 	TRB_SET(TT, cmd, TRB_CMD_ENABLE_SLOT);
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| 	xhci_post_command(xhci);
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| 
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| 	int cc = xhci_wait_for_command(xhci, cmd, 0);
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| 	if (cc >= 0) {
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| 		if (cc == CC_SUCCESS) {
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| 			*slot_id = TRB_GET(ID, xhci->er.cur);
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| 			if (*slot_id > xhci->max_slots_en)
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| 				cc = CONTROLLER_ERROR;
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| 		}
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| 		xhci_advance_event_ring(xhci);
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| 		xhci_handle_events(xhci);
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| 	}
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| 	return cc;
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| }
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| 
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| int
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| xhci_cmd_disable_slot(xhci_t *const xhci, const int slot_id)
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| {
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| 	trb_t *const cmd = xhci_next_command_trb(xhci);
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| 	TRB_SET(TT, cmd, TRB_CMD_DISABLE_SLOT);
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| 	TRB_SET(ID, cmd, slot_id);
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| 	xhci_post_command(xhci);
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| 
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| 	return xhci_wait_for_command(xhci, cmd, 1);
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| }
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| 
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| int
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| xhci_cmd_address_device(xhci_t *const xhci,
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| 			const int slot_id,
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| 			inputctx_t *const ic)
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| {
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| 	trb_t *const cmd = xhci_next_command_trb(xhci);
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| 	TRB_SET(TT, cmd, TRB_CMD_ADDRESS_DEV);
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| 	TRB_SET(ID, cmd, slot_id);
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| 	cmd->ptr_low = virt_to_phys(ic->raw);
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| 	xhci_post_command(xhci);
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| 
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| 	return xhci_wait_for_command(xhci, cmd, 1);
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| }
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| 
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| int
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| xhci_cmd_configure_endpoint(xhci_t *const xhci,
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| 			    const int slot_id,
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| 			    const int config_id,
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| 			    inputctx_t *const ic)
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| {
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| 	trb_t *const cmd = xhci_next_command_trb(xhci);
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| 	TRB_SET(TT, cmd, TRB_CMD_CONFIGURE_EP);
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| 	TRB_SET(ID, cmd, slot_id);
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| 	cmd->ptr_low = virt_to_phys(ic->raw);
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| 	if (config_id == 0)
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| 		TRB_SET(DC, cmd, 1);
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| 	xhci_post_command(xhci);
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| 
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| 	return xhci_wait_for_command(xhci, cmd, 1);
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| }
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| 
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| int
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| xhci_cmd_evaluate_context(xhci_t *const xhci,
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| 			  const int slot_id,
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| 			  inputctx_t *const ic)
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| {
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| 	trb_t *const cmd = xhci_next_command_trb(xhci);
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| 	TRB_SET(TT, cmd, TRB_CMD_EVAL_CTX);
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| 	TRB_SET(ID, cmd, slot_id);
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| 	cmd->ptr_low = virt_to_phys(ic->raw);
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| 	xhci_post_command(xhci);
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| 
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| 	return xhci_wait_for_command(xhci, cmd, 1);
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| }
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| 
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| int
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| xhci_cmd_reset_endpoint(xhci_t *const xhci, const int slot_id, const int ep)
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| {
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| 	trb_t *const cmd = xhci_next_command_trb(xhci);
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| 	TRB_SET(TT, cmd, TRB_CMD_RESET_EP);
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| 	TRB_SET(ID, cmd, slot_id);
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| 	TRB_SET(EP, cmd, ep);
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| 	xhci_post_command(xhci);
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| 
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| 	return xhci_wait_for_command(xhci, cmd, 1);
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| }
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| 
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| int
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| xhci_cmd_stop_endpoint(xhci_t *const xhci, const int slot_id, const int ep)
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| {
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| 	trb_t *const cmd = xhci_next_command_trb(xhci);
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| 	TRB_SET(TT, cmd, TRB_CMD_STOP_EP);
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| 	TRB_SET(ID, cmd, slot_id);
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| 	TRB_SET(EP, cmd, ep);
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| 	xhci_post_command(xhci);
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| 
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| 	return xhci_wait_for_command(xhci, cmd, 1);
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| }
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| 
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| int
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| xhci_cmd_set_tr_dq(xhci_t *const xhci, const int slot_id, const int ep,
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| 		   trb_t *const dq_trb, const int dcs)
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| {
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| 	trb_t *const cmd = xhci_next_command_trb(xhci);
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| 	TRB_SET(TT, cmd, TRB_CMD_SET_TR_DQ);
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| 	TRB_SET(ID, cmd, slot_id);
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| 	TRB_SET(EP, cmd, ep);
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| 	cmd->ptr_low = virt_to_phys(dq_trb) | dcs;
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| 	xhci_post_command(xhci);
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| 
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| 	return xhci_wait_for_command(xhci, cmd, 1);
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| }
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