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system76-coreboot/src/soc/intel/common/Kconfig
Martin Roth 0974dbe89a soc/intel/common: CACHE_MRC_SETTINGS doesn't depend on HAVE_MRC
The FSP platforms use CACHE_MRC_SETTINGS without setting HAVE_MRC,
which caused a Kconfig warning. Since CACHE_MRC_SETTINGS doesn't really
depend on HAVE_MRC anymore, remove the dependency in Kconfig.

Fixes Kconfig warnings:
warning: (CPU_SPECIFIC_OPTIONS && CPU_SPECIFIC_OPTIONS
&& CPU_SPECIFIC_OPTIONS && CPU_SPECIFIC_OPTIONS)
selects CACHE_MRC_SETTINGS which has unmet direct dependencies
(SOC_INTEL_BROADWELL && HAVE_MRC || SOC_INTEL_COMMON && HAVE_MRC)

Change-Id: Id1c108f73d19cbd53b91e1671d57e7752be5d96d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11288
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2015-08-21 19:53:05 +00:00

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config SOC_INTEL_COMMON
bool
help
common code for Intel SOCs
if SOC_INTEL_COMMON
config CACHE_MRC_SETTINGS
bool "Save cached MRC settings"
default n
help
If CONFIG_USE_FMAP is enabled, it is assumed that a flashmap
containing an RW_MRC_CACHE entry that specifies the location and size
of the cache will be added to the image and present at runtime.
if CACHE_MRC_SETTINGS
config MRC_SETTINGS_CACHE_BASE
hex
depends on !USE_FMAP
default 0xffb00000
config MRC_SETTINGS_CACHE_SIZE
hex
depends on !USE_FMAP
default 0x10000
config MRC_SETTINGS_PROTECT
bool "Enable protection on MRC settings"
depends on !USE_FMAP
default n
endif # CACHE_MRC_SETTINGS
config DISPLAY_MTRRS
bool "MTRRs: Display the MTRR settings"
default n
config DISPLAY_SMM_MEMORY_MAP
bool "SMM: Display the SMM memory map"
default n
config SOC_INTEL_COMMON_FSP_RAM_INIT
bool "FSP: Use the common raminit.c module"
default n
depends on PLATFORM_USES_FSP1_1
config SOC_INTEL_COMMON_FSP_ROMSTAGE
bool
default n
depends on PLATFORM_USES_FSP1_1
config SOC_INTEL_COMMON_RESET
bool
default n
config SOC_INTEL_COMMON_STACK
bool
default n
depends on PLATFORM_USES_FSP1_1
config SOC_INTEL_COMMON_STAGE_CACHE
bool
default n
depends on PLATFORM_USES_FSP1_1
config ROMSTAGE_RAM_STACK_SIZE
hex "Size of the romstage RAM stack in bytes"
default 0x5000
depends on SOC_INTEL_COMMON_STACK
endif # SOC_INTEL_COMMON