0a4e0fd913
The PNOT method never notifies the CPU to update it's _CST methods due to reliance on inexisting variable (PDCx). Add a method in the speedstep ssdt generator to notify all available CPU nodes and hook this up in this file. The cpu.asl file is moved to cpu/intel/speedstep/acpi since it now relies on code generated in the speedstep ssdt generator. CPUs not using the speedstep code never included this PNOT method so this is a logical place for this code to be. Change-Id: Ie2ba5e07b401d6f7c80c31f2bfcd9ef3ac0c1ad1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
32 lines
870 B
Plaintext
32 lines
870 B
Plaintext
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* These come from the dynamically created CPU SSDT */
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External (\_PR.CNOT, MethodObj)
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External (\_PR_.CP00, DeviceObj)
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External (\_PR_.CP00._PPC)
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External (\_PR_.CP01._PPC)
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Method (PNOT)
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{
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If (MPEN) {
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\_PR.CNOT (0x80) // _PPC
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Sleep(100)
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\_PR.CNOT (0x81) // _CST
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} Else { // UP
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Notify (\_PR_.CP00, 0x80)
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Sleep(0x64)
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Notify(\_PR_.CP00, 0x81)
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}
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}
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