system76-coreboot

Files

Kyösti Mälkki 0a78f91fa3 Intel model_106cx: change CAR to HT-capable

There are hyper-threading Atom CPUs, those would not enable L2
cache with model_6ex CAR code. Switch to code that can handle
different number of threads and cores.

Change-Id: I57328c231f8998f45f7b0d26c63b24585f8476dd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1384
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-by: James Laird <jhl@mafipulation.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

2012-08-27 15:39:29 +02:00

arch/x86

MPTABLE: check for fixed IRQ entries on all pins

2012-08-25 05:15:50 +02:00

boot

Implement stack overflow checking for the BSP

2012-07-24 23:29:12 +02:00

console

Add a capability for mainboard-specific posting.

2012-08-04 19:31:20 +02:00

cpu

Intel model_106cx: change CAR to HT-capable