7dcf9d51e5
This patch removes the old arm64/stage_entry.S code that was too specific to the Tegra SoC boot flow, and replaces it with code that hides the peculiarities of switching to a different CPU/arch in ramstage in the Tegra SoC directories. BRANCH=None BUG=None TEST=Built Ryu and Smaug. !!!UNTESTED!!! Change-Id: Ib3a0448b30ac9c7132581464573efd5e86e03698 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/12078 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
138 lines
4.4 KiB
Makefile
138 lines
4.4 KiB
Makefile
ifeq ($(CONFIG_SOC_NVIDIA_TEGRA132),y)
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bootblock-y += bootblock.c
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bootblock-y += bootblock_asm.S
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bootblock-y += clock.c
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bootblock-y += spi.c
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bootblock-y += i2c.c
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bootblock-y += dma.c
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bootblock-y += monotonic_timer.c
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bootblock-y += padconfig.c
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bootblock-y += power.c
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bootblock-y += funitcfg.c
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bootblock-y += reset.c
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bootblock-y += ../tegra/gpio.c
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bootblock-y += ../tegra/i2c.c
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bootblock-y += ../tegra/pingroup.c
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bootblock-y += ../tegra/pinmux.c
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bootblock-y += ../tegra/apbmisc.c
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bootblock-y += ../tegra/usb.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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endif
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verstage-y += dma.c
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verstage-y += monotonic_timer.c
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verstage-y += spi.c
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verstage-y += padconfig.c
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verstage-y += funitcfg.c
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verstage-$(CONFIG_DRIVERS_UART) += uart.c
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verstage-y += ../tegra/gpio.c
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verstage-y += ../tegra/i2c.c
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verstage-y += ../tegra/pinmux.c
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verstage-y += clock.c
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verstage-y += i2c.c
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romstage-y += 32bit_reset.S
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romstage-y += romstage_asm.S
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romstage-y += addressmap.c
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romstage-y += cbmem.c
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romstage-y += ccplex.c
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romstage-y += clock.c
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romstage-y += cpu.c
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romstage-y += reset.c
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romstage-y += spi.c
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romstage-y += i2c.c
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romstage-y += dma.c
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romstage-y += monotonic_timer.c
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romstage-y += padconfig.c
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romstage-y += funitcfg.c
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romstage-y += romstage.c
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romstage-y += power.c
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romstage-y += sdram.c
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romstage-y += sdram_lp0.c
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romstage-y += ../tegra/gpio.c
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romstage-y += ../tegra/i2c.c
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romstage-y += ../tegra/pinmux.c
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romstage-y += ../tegra/usb.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += 32bit_reset.S
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ramstage-y += addressmap.c
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ramstage-y += cbmem.c
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ramstage-y += cpu.c
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ramstage-y += clock.c
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ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += dc.c
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ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += dsi.c
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ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi_dsi.c
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ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi.c
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ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi-phy.c
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ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += ./jdi_25x18_display/panel-jdi-lpm102a188a.c
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ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += dp.c
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ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += sor.c
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ramstage-y += soc.c
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ramstage-y += spi.c
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ramstage-y += i2c.c
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ramstage-y += i2c6.c
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ramstage-y += power.c
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ramstage-y += dma.c
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ramstage-y += gic.c
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ramstage-y += monotonic_timer.c
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ramstage-y += padconfig.c
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ramstage-y += funitcfg.c
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ramstage-y += reset.c
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ramstage-y += ../tegra/apbmisc.c
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ramstage-y += ../tegra/gpio.c
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ramstage-y += ../tegra/i2c.c
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ramstage-y += ../tegra/pinmux.c
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ramstage-y += ramstage.c
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ramstage-y += mmu_operations.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += ../tegra/usb.c
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ramstage-y += stage_entry.S
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modules_arm-y += monotonic_timer.c
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CPPFLAGS_common += -Isrc/soc/nvidia/tegra132/include/
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CBOOTIMAGE_OPTS = --soc tegra132
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# We want to grab the bootblock right before it goes into the image and wrap
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# it inside a BCT, but ideally we would do that without making special, one
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# use modifications to the main ARM Makefile. We do this in two ways. First,
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# we copy bootblock.elf to bootblock.raw.elf and allow the %.bin: %.elf
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# template rule to turn it into bootblock.raw.bin. This makes sure whatever
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# processing is supposed to happen to turn an .elf into a .bin happens.
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#
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# Second, we add our own rule for creating bootblock.bin from
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# bootblock.raw.bin which displaces the template rule. When other rules that
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# package up the image pull in bootblock.bin, it will be this wrapped version
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# instead of the raw bootblock.
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$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE)
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@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
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$(CBOOTIMAGE) -gbct $(CBOOTIMAGE_OPTS) $< $@
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BCT_BIN = $(obj)/generated/bct.bin
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BCT_WRAPPER = $(obj)/generated/bct.wrapper
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MTS_DIR = $(CONFIG_MTS_DIRECTORY)
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PREBOOT_MTS_FILE = $(MTS_DIR)/preboot_cr.bin
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) $(CBOOTIMAGE)
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echo "Version = 1;" > $(BCT_WRAPPER)
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echo "Redundancy = 1;" >> $(BCT_WRAPPER)
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echo "Bctcopy = 1;" >> $(BCT_WRAPPER)
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echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER)
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echo "MtsPreboot = $(PREBOOT_MTS_FILE),0x4000f000,0x4000f000,Complete;" >> $(BCT_WRAPPER)
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echo "BootLoader = $<,$(call loadaddr,bootblock),$(call loadaddr,bootblock),Complete;" >> $(BCT_WRAPPER)
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@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
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$(CBOOTIMAGE) $(CBOOTIMAGE_OPTS) $(BCT_WRAPPER) $@
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# MTS microcode
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MTS_FILE = $(MTS_DIR)/mts_cr.bin
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MTS_FILE_CBFS = mts
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cbfs-files-y += $(MTS_FILE_CBFS)
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$(MTS_FILE_CBFS)-file := $(MTS_FILE)
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$(MTS_FILE_CBFS)-type := raw
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endif
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