114d7c3ada
To further the ability of multiple variant boards to share code provide a place to land the split up changes. This patch provides the tooling using a new Kconfig value, VARIANT_DIR, as well as the Make plumbing. The directory layout with a single variant, reef (which is also the baseboard), looks like this: variants/baseboard - code variants/baseboard/include/baseboard - headers variants/reef - code variants/reef/include/variant - headers New boards would then add themselves under their board name within the 'variants' directory. No split has been done with providing different logic yet. This is purely a organizational change. BUG=chrome-os-partner:56677 Change-Id: Ib73a3c8a3729546257623171ef6d8fa7a9f16514 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16418 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
86 lines
2.2 KiB
C
86 lines
2.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2016 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi.h>
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#include <boardid.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <nhlt.h>
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#include <soc/gpio.h>
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#include <soc/nhlt.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <variant/ec.h>
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#include <variant/gpio.h>
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static void mainboard_init(void *chip_info)
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{
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int boardid;
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boardid = board_id();
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printk(BIOS_INFO, "Board ID: %d\n", boardid);
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gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
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mainboard_ec_init();
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}
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static unsigned long mainboard_write_acpi_tables(
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device_t device, unsigned long current, acpi_rsdp_t *rsdp)
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{
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uintptr_t start_addr;
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uintptr_t end_addr;
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struct nhlt *nhlt;
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start_addr = current;
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nhlt = nhlt_init();
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if (nhlt == NULL)
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return start_addr;
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/* 2 Channel DMIC array. */
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if (!nhlt_soc_add_dmic_array(nhlt, 2))
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printk(BIOS_ERR, "Added 2CH DMIC array.\n");
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/* Dialog for Headset codec.
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* Headset codec is bi-directional but uses the same configuration
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* settings for render and capture endpoints.
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*/
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if (!nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1))
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printk(BIOS_ERR, "Added Dialog_7219 codec.\n");
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/* MAXIM Smart Amps for left and right speakers. */
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if (!nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP5))
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printk(BIOS_ERR, "Added Maxim_98357 codec.\n");
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end_addr = nhlt_soc_serialize(nhlt, start_addr);
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if (end_addr != start_addr)
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acpi_add_table(rsdp, (void *)start_addr);
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return end_addr;
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
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dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
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}
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struct chip_operations mainboard_ops = {
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.init = mainboard_init,
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.enable_dev = mainboard_enable,
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};
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