1364ac3478
EBG (Emmitsburg) PCH is used in Intel SPR-SP chipset. Its datasheet is Intel doc# 606161. Add Intel Emmitsburg PCH GPIO pin definitions. Also common code change is made to support Intel Emmitsburg PCH: a. Instead of 2 PAD registers per GPIO, it has 4 PAD registers. b. The register address space may not be contiguous from one GPIO group to the next GPIO group. Change-Id: Ia0d9179544020b6abb0be1ecd275a9a46356db8a Signed-off-by: Jonathan Zhang <jonzhang@meta.com> Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
24 lines
519 B
C
24 lines
519 B
C
#ifndef GPIO_NAMES_GPIO_GROUPS_H
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#define GPIO_NAMES_GPIO_GROUPS_H
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struct gpio_group {
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const char *display;
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size_t pad_count;
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size_t func_count;
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/*
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* This field is necessary for EBG, since the pad configuration registers
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* within a community are no longer contiguous.
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*/
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uint32_t pad_offset;
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const char *const *pad_names; /* indexed by 'pad * func_count + func' */
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};
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struct gpio_community {
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const char *name;
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uint8_t pcr_port_id;
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size_t group_count;
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const struct gpio_group *const *groups;
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};
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#endif
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