Enables the driver for ITE SIOs supporting the GPIO register layout (confirmed with datasheets for the modified ITE SIO Kconfigs, SIOs with unavailable datasheets are unmodified). Other ITE SIOs may select it with SUPERIO_ITE_COMMON_GPIO_PRE_RAM and must then provide the number of GPIO sets specific to a chip via SUPERIO_ITE_COMMON_NUM_GPIO_SETS. Change-Id: I0868ff3e9022b135c21f4c1a6746d6440b8f0798 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83468 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
21 lines
500 B
Plaintext
21 lines
500 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config SUPERIO_ITE_IT8613E
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bool
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select SUPERIO_ITE_COMMON_PRE_RAM
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select SUPERIO_ITE_COMMON_GPIO_PRE_RAM
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select SUPERIO_ITE_COMMON_GPIO_LED_FREQ_5BIT
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select SUPERIO_ITE_ENV_CTRL
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select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2
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select SUPERIO_ITE_ENV_CTRL_8BIT_PWM
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select SUPERIO_ITE_ENV_CTRL_5FANS
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select SUPERIO_ITE_ENV_CTRL_NO_ONOFF
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select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN
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if SUPERIO_ITE_IT8613E
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config SUPERIO_ITE_COMMON_NUM_GPIO_SETS
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default 6
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endif
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