Now that pci_devs.h is part of soc/ and not used for multiple
southbridges:
* Remove devices not present in the Stoney Ridge APU
* Complete the list to include additional devices besides
those in the FCH.
BUG=chrome-os-partner:62578372
Change-Id: I1cd2d5e41473f362bbfd28ee93788a292bc33991
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/20370
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>