Firmware component that does memory training already limits the memory controller to train at 5500 Mbps for all memory parts in Sabrina. Hence removing this interim SPD change to limit the speed. BUG=b:238074863 TEST=Build and boot to OS in Skyrim. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I2bc82c7407a97aac282708c3e0bd56ae99a8fc31 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66290 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
		
			
				
	
	
		
			33 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			33 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| 23 11 13 0E 85 21 F9 18 00 40 00 00 09 02 00 00
 | |
| 00 00 03 00 00 00 00 00 2B 00 90 A8 90 90 06 C0
 | |
| 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 B9 00 C1 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
 | |
| 20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 | |
| 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 |