1587dc8a2b
Copy northbridge files from northbridge/amd/pi/00670F00 to soc/amd/stoneyridge and soc/amd/common. Changes: - update chip_ops and device_ops - remove multi-node support - clean up Kconfig and Makefile Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/19724 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
82 lines
2.0 KiB
C
82 lines
2.0 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <chip.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/cpu.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <soc/hudson.h>
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#include <soc/northbridge.h>
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static void cpu_bus_init(device_t dev)
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{
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initialize_cpus(dev->link_list);
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}
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struct device_operations cpu_bus_ops = {
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.read_resources = DEVICE_NOOP,
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.set_resources = DEVICE_NOOP,
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.enable_resources = DEVICE_NOOP,
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.init = &cpu_bus_init,
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.scan_bus = cpu_bus_scan,
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};
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struct device_operations pci_domain_ops = {
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.read_resources = domain_read_resources,
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.set_resources = domain_set_resources,
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.enable_resources = domain_enable_resources,
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.init = NULL,
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.scan_bus = pci_domain_scan_bus,
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.ops_pci_bus = pci_bus_default_ops,
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};
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static void enable_dev(device_t dev)
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{
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static int done = 0;
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if (!done) {
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setup_bsp_ramtop();
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done = 1;
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}
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/* Set the operations if it is a special bus type */
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if (dev->path.type == DEVICE_PATH_DOMAIN) {
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dev->ops = &pci_domain_ops;
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} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
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dev->ops = &cpu_bus_ops;
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} else if (dev->path.type == DEVICE_PATH_PCI) {
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hudson_enable(dev);
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}
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}
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static void soc_init(void *chip_info)
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{
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hudson_init(chip_info);
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}
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static void soc_final(void *chip_info)
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{
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hudson_final(chip_info);
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fam15_finalize(chip_info);
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}
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struct chip_operations soc_amd_stoneyridge_ops = {
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CHIP_NAME("AMD StoneyRidge SOC")
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.enable_dev = &enable_dev,
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.init = &soc_init,
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.final = &soc_final
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};
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