York Yang 15fca66bf0 vendorcode/intel/fsp1_0: Add Broadwell-DE SoC vendor code ...

Initial vendor codes to support Broadwell-DE SoC. This is FSP 1.0 based
project and is based on Broadwell-DE Gold release. Change has been
verified on Intel Camelback Mountain CRB.

Change-Id: I9262c9d70a58f0c7427f0658948adf080f2f6d8f
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: https://review.coreboot.org/14030
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

2016-03-14 18:24:43 +01:00

..

acpi

acpi/: add missing license header

2016-01-14 22:52:11 +01:00

arch

arch/x86/smbios: fix length calculation for SMBIOS type 17

2016-03-11 16:53:39 +01:00

commonlib

lz4_wrapper: Use __asm__ rather than asm.

2016-03-05 00:56:53 +01:00

console

Kconfig: hide useless options on ARM.

2016-03-05 00:56:36 +01:00

cpu

cpu/via/c7: Don't manually include udelay_io.c

2016-03-10 16:56:23 +01:00

device

Kconfig: hide useless options on ARM.

2016-03-05 00:56:36 +01:00

drivers

intel/fsp1.1: Mark graphics init done after SiliconInit phase

2016-03-14 10:53:19 +01:00

ec

Hide EC_GOOGLE_CHROMEEC_SPI_BUS.

2016-03-05 00:57:22 +01:00

include

device/i2c: Add i2c_read_bytes() API

2016-03-12 09:11:43 +01:00

lib

cbmem: Fix cbmem_add_bootmem()

2016-03-11 09:52:46 +01:00

mainboard

northbridge/intel/i3100: Unify UDELAY selection

2016-03-13 02:22:39 +01:00

northbridge

nb/amd/mct_ddr3: Use correct initial UI setting during DRAM training

2016-03-13 23:42:41 +01:00

soc

intel/fsp_baytrail: Enable LPSS in ACPI mode

2016-03-14 18:24:10 +01:00

southbridge

southbridge/intel/ibexpeak: Use common gpio.c

2016-02-23 00:28:26 +01:00

superio

roda/rk9: Remove #include early_serial.c from romstage

2016-03-08 13:41:03 +01:00

vendorcode

vendorcode/intel/fsp1_0: Add Broadwell-DE SoC vendor code

2016-03-14 18:24:43 +01:00

Kconfig

Kconfig: remove COMPRESS_PRERAM_STAGES option from x86

2016-03-11 16:52:38 +01:00