Allows compile-time optimisation on platforms that do not wish to enable runtime checking of X2APIC. Legacy lapic_cpu_init() is incompatible so there is dependency on PARALLEL_MP. Also stop_this_cpu() is incompatible, so there is dependency on !AP_IN_SIPI_WAIT. Since the code actually lacks enablement of X2APIC (apparently assuming the blob has done it) and the other small flaws pointed out in earlier reviews, X2APIC_RUNTIME is not selected per default on any platform yet. Change-Id: I8269f9639ee3e89a2c2b4178d266ba2dac46db3f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55073 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
57 lines
1.6 KiB
C
57 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <cpu/x86/lapic.h>
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#include <console/console.h>
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#if !CONFIG(XAPIC_ONLY)
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#error "BUG: lapic_write_around() needs to be fixed for X2APIC."
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#endif
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void lapic_virtual_wire_mode_init(void)
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{
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/* this is so interrupts work. This is very limited scope --
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* linux will do better later, we hope ...
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*/
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/* this is the first way we learned to do it. It fails on real SMP
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* stuff. So we have to do things differently ...
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* see the Intel mp1.4 spec, page A-3
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*/
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printk(BIOS_INFO, "Setting up local APIC...\n");
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/* Enable the local APIC */
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enable_lapic();
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/*
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* Set Task Priority to 'accept all'.
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*/
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lapic_write_around(LAPIC_TASKPRI,
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lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
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/* Put the local APIC in virtual wire mode */
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lapic_write_around(LAPIC_SPIV,
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(lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
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| LAPIC_SPIV_ENABLE);
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lapic_write_around(LAPIC_LVT0,
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(lapic_read_around(LAPIC_LVT0) &
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~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
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LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
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LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
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LAPIC_DELIVERY_MODE_MASK))
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| (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
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LAPIC_DELIVERY_MODE_EXTINT)
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);
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lapic_write_around(LAPIC_LVT1,
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(lapic_read_around(LAPIC_LVT1) &
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~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
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LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
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LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 |
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LAPIC_DELIVERY_MODE_MASK))
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| (LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING |
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LAPIC_DELIVERY_MODE_NMI)
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);
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printk(BIOS_DEBUG, " apic_id: 0x%x ", lapicid());
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printk(BIOS_INFO, "done.\n");
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}
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