17c951b2c4
Change-Id: I125e40204f3a9602ee5810d341ef40f9f50d045b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48897 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
113 lines
3.3 KiB
Makefile
113 lines
3.3 KiB
Makefile
## SPDX-License-Identifier: GPL-2.0-only
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ifeq ($(CONFIG_HAVE_INTEL_FIRMWARE),y)
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# Run intermediate steps when producing coreboot.rom
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# that adds additional components to the final firmware
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# image outside of CBFS
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ifeq ($(CONFIG_HAVE_IFD_BIN),y)
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PHONY+=add_intel_firmware
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INTERMEDIATE+=add_intel_firmware
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else ifeq ($(CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED),y)
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files_added:: warn_intel_firmware
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endif
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IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH)
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ifneq ($(call strip_quotes,$(CONFIG_IFD_CHIPSET)),)
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IFDTOOL_USE_CHIPSET := -p $(CONFIG_IFD_CHIPSET)
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endif
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ifeq ($(CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS),y)
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IFDTOOL_LOCK_ME_MODE := -lr
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else
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IFDTOOL_LOCK_ME_MODE := -l
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endif
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add_intel_firmware: $(call strip_quotes,$(CONFIG_IFD_BIN_PATH))
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ifeq ($(CONFIG_HAVE_ME_BIN),y)
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add_intel_firmware: $(call strip_quotes,$(CONFIG_ME_BIN_PATH))
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endif
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ifeq ($(CONFIG_HAVE_GBE_BIN),y)
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add_intel_firmware: $(call strip_quotes,$(CONFIG_GBE_BIN_PATH))
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endif
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ifeq ($(CONFIG_HAVE_EC_BIN),y)
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add_intel_firmware: $(call strip_quotes,$(CONFIG_EC_BIN_PATH))
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endif
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add_intel_firmware: $(obj)/coreboot.pre $(IFDTOOL)
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printf " DD Adding Intel Firmware Descriptor\n"
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flock $< dd if=$(IFD_BIN_PATH) \
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of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
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ifeq ($(CONFIG_VALIDATE_INTEL_DESCRIPTOR),y)
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$(objutil)/ifdtool/ifdtool \
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$(IFDTOOL_USE_CHIPSET) \
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-t $(obj)/coreboot.pre
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endif
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ifeq ($(CONFIG_HAVE_ME_BIN),y)
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printf " IFDTOOL me.bin -> coreboot.pre\n"
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$(objutil)/ifdtool/ifdtool \
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$(IFDTOOL_USE_CHIPSET) \
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-i ME:$(CONFIG_ME_BIN_PATH) \
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-O $(obj)/coreboot.pre \
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$(obj)/coreboot.pre
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endif
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ifeq ($(CONFIG_CHECK_ME),y)
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util/me_cleaner/me_cleaner.py -c $(obj)/coreboot.pre > /dev/null
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endif
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ifeq ($(CONFIG_USE_ME_CLEANER),y)
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printf " ME_CLEANER coreboot.pre\n"
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util/me_cleaner/me_cleaner.py $(obj)/coreboot.pre \
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$(patsubst "%,%,$(patsubst %",%,$(CONFIG_ME_CLEANER_ARGS))) > \
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$(obj)/me_cleaner.log
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endif
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ifeq ($(CONFIG_HAVE_GBE_BIN),y)
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printf " IFDTOOL gbe.bin -> coreboot.pre\n"
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$(objutil)/ifdtool/ifdtool \
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$(IFDTOOL_USE_CHIPSET) \
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-i GbE:$(CONFIG_GBE_BIN_PATH) \
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-O $(obj)/coreboot.pre \
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$(obj)/coreboot.pre
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endif
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ifeq ($(CONFIG_HAVE_EC_BIN),y)
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printf " IFDTOOL ec.bin -> coreboot.pre\n"
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$(objutil)/ifdtool/ifdtool \
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$(IFDTOOL_USE_CHIPSET) \
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-i EC:$(CONFIG_EC_BIN_PATH) \
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-O $(obj)/coreboot.pre \
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$(obj)/coreboot.pre
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endif
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ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
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printf " IFDTOOL Locking Management Engine\n"
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$(objutil)/ifdtool/ifdtool \
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$(IFDTOOL_USE_CHIPSET) $(IFDTOOL_LOCK_ME_MODE) \
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-O $(obj)/coreboot.pre \
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$(obj)/coreboot.pre
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endif
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ifeq ($(CONFIG_UNLOCK_FLASH_REGIONS),y)
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printf " IFDTOOL Unlocking Management Engine\n"
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$(objutil)/ifdtool/ifdtool \
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$(IFDTOOL_USE_CHIPSET) -u \
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-O $(obj)/coreboot.pre \
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$(obj)/coreboot.pre
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endif
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ifeq ($(CONFIG_EM100),y)
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printf " IFDTOOL Setting EM100 mode\n"
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$(objutil)/ifdtool/ifdtool \
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$(IFDTOOL_USE_CHIPSET) --em100 \
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-O $(obj)/coreboot.pre \
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$(obj)/coreboot.pre
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endif
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warn_intel_firmware:
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printf "\n\t** WARNING **\n"
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printf "coreboot has been built without an Intel Firmware Descriptor.\n"
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printf "Never write a complete coreboot.rom without an IFD to your\n"
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printf "board's flash chip! You can use flashrom's IFD or layout\n"
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printf "parameters to flash only to the BIOS region.\n\n"
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PHONY+=add_intel_firmware warn_intel_firmware
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endif
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