461 lines
12 KiB
C
461 lines
12 KiB
C
/*
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* Copyright 2016 Google Inc.
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*
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* Based on Linux Kernel TPM driver by
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* Peter Huewe <peter.huewe@infineon.com>
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* Copyright (C) 2011 Infineon Technologies
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation, version 2 of the
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* License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* cr50 is a TPM 2.0 capable device that requries special
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* handling for the I2C interface.
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*
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* - Use an interrupt for transaction status instead of hardcoded delays
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* - Must use write+wait+read read protocol
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* - All 4 bytes of status register must be read/written at once
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* - Burst count max is 63 bytes, and burst count behaves
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* slightly differently than other I2C TPMs
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* - When reading from FIFO the full burstcnt must be read
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* instead of just reading header and determining the remainder
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*/
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#include <arch/early_variables.h>
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#include <commonlib/endian.h>
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#include <stdint.h>
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#include <string.h>
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#include <types.h>
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#include <delay.h>
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#include <console/console.h>
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#include <device/i2c.h>
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#include <endian.h>
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#include <timer.h>
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#include "tpm.h"
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#define CR50_MAX_BUFSIZE 63
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#define CR50_TIMEOUT_LONG_MS 2000 /* Long timeout while waiting for TPM */
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#define CR50_TIMEOUT_SHORT_MS 2 /* Short timeout during transactions */
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#define CR50_DID_VID 0x00281ae0L
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struct tpm_inf_dev {
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int bus;
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unsigned int addr;
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uint8_t buf[CR50_MAX_BUFSIZE + sizeof(uint8_t)];
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};
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static struct tpm_inf_dev g_tpm_dev CAR_GLOBAL;
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/*
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* iic_tpm_read() - read from TPM register
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*
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* @addr: register address to read from
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* @buffer: provided by caller
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* @len: number of bytes to read
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*
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* 1) send register address byte 'addr' to the TPM
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* 2) wait for TPM to indicate it is ready
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* 3) read 'len' bytes of TPM response into the provided 'buffer'
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*
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* Return -1 on error, 0 on success.
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*/
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static int iic_tpm_read(uint8_t addr, uint8_t *buffer, size_t len)
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{
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struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev);
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if (tpm_dev->addr == 0)
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return -1;
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/* Send the register address byte to the TPM */
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if (i2c_write_raw(tpm_dev->bus, tpm_dev->addr, &addr, 1)) {
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printk(BIOS_ERR, "%s: Address write failed\n", __func__);
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return -1;
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}
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/* Wait for TPM to be ready with response data */
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mdelay(CR50_TIMEOUT_SHORT_MS);
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/* Read response data from the TPM */
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if (i2c_read_raw(tpm_dev->bus, tpm_dev->addr, buffer, len)) {
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printk(BIOS_ERR, "%s: Read response failed\n", __func__);
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return -1;
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}
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return 0;
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}
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/*
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* iic_tpm_write() - write to TPM register
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*
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* @addr: register address to write to
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* @buffer: data to write
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* @len: number of bytes to write
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*
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* 1) prepend the provided address to the provided data
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* 2) send the address+data to the TPM
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* 3) wait for TPM to indicate it is done writing
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*
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* Returns -1 on error, 0 on success.
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*/
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static int iic_tpm_write(uint8_t addr, uint8_t *buffer, size_t len)
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{
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struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev);
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if (tpm_dev->addr == 0)
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return -1;
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if (len > CR50_MAX_BUFSIZE)
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return -1;
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/* Prepend the 'register address' to the buffer */
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tpm_dev->buf[0] = addr;
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memcpy(tpm_dev->buf + 1, buffer, len);
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/* Send write request buffer with address */
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if (i2c_write_raw(tpm_dev->bus, tpm_dev->addr, tpm_dev->buf, len + 1)) {
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printk(BIOS_ERR, "%s: Error writing to TPM\n", __func__);
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return -1;
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}
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/* Wait for TPM to be ready */
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mdelay(CR50_TIMEOUT_SHORT_MS);
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return 0;
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}
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static int check_locality(struct tpm_chip *chip, int loc)
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{
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uint8_t buf;
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if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0)
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return -1;
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if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
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chip->vendor.locality = loc;
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return loc;
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}
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return -1;
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}
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static void release_locality(struct tpm_chip *chip, int loc, int force)
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{
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uint8_t buf;
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if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0)
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return;
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if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) {
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buf = TPM_ACCESS_ACTIVE_LOCALITY;
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iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
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}
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}
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static int request_locality(struct tpm_chip *chip, int loc)
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{
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uint8_t buf = TPM_ACCESS_REQUEST_USE;
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if (check_locality(chip, loc) >= 0)
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return loc; /* we already have the locality */
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iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
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/* wait for burstcount */
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int timeout = 2 * 1000; /* 2s timeout */
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while (timeout) {
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if (check_locality(chip, loc) >= 0)
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return loc;
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mdelay(TPM_TIMEOUT);
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timeout--;
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}
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return -1;
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}
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/* cr50 requires all 4 bytes of status register to be read */
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static uint8_t cr50_tis_i2c_status(struct tpm_chip *chip)
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{
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uint8_t buf[4];
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if (iic_tpm_read(TPM_STS(chip->vendor.locality),
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buf, sizeof(buf)) < 0) {
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printk(BIOS_ERR, "%s: Failed to read status\n", __func__);
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return 0;
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}
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return buf[0];
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}
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/* cr50 requires all 4 bytes of status register to be written */
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static void cr50_tis_i2c_ready(struct tpm_chip *chip)
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{
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uint8_t buf[4] = { TPM_STS_COMMAND_READY };
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iic_tpm_write(TPM_STS(chip->vendor.locality), buf, sizeof(buf));
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mdelay(CR50_TIMEOUT_SHORT_MS);
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}
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/* cr50 uses bytes 3:2 of status register for burst count and
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* all 4 bytes must be read */
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static int cr50_wait_burst_status(struct tpm_chip *chip, uint8_t mask,
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size_t *burst, int *status)
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{
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uint8_t buf[4];
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struct stopwatch sw;
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stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS);
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while (!stopwatch_expired(&sw)) {
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if (iic_tpm_read(TPM_STS(chip->vendor.locality),
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buf, sizeof(buf)) != 0) {
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printk(BIOS_WARNING, "%s: Read failed\n", __func__);
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mdelay(CR50_TIMEOUT_SHORT_MS);
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continue;
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}
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*status = buf[0];
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*burst = read_le16(&buf[1]);
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/* Check if mask matches and burst is valid */
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if ((*status & mask) == mask &&
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*burst > 0 && *burst <= CR50_MAX_BUFSIZE)
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return 0;
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mdelay(CR50_TIMEOUT_SHORT_MS);
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}
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printk(BIOS_ERR, "%s: Timeout reading burst and status\n", __func__);
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return -1;
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}
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static int cr50_tis_i2c_recv(struct tpm_chip *chip, uint8_t *buf,
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size_t buf_len)
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{
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size_t burstcnt, current, len, expected;
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uint8_t addr = TPM_DATA_FIFO(chip->vendor.locality);
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int status;
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int ret = -1;
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if (buf_len < TPM_HEADER_SIZE)
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goto out;
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if (cr50_wait_burst_status(chip, TPM_STS_VALID, &burstcnt, &status) < 0)
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goto out;
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if (!(status & TPM_STS_DATA_AVAIL)) {
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printk(BIOS_ERR, "%s: First chunk not available\n", __func__);
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goto out;
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}
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/* Read first chunk of burstcnt bytes */
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if (iic_tpm_read(addr, buf, burstcnt) != 0) {
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printk(BIOS_ERR, "%s: Read failed\n", __func__);
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goto out;
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}
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/* Determine expected data in the return buffer */
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expected = read_be32(buf + TPM_RSP_SIZE_BYTE);
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if (expected > buf_len) {
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printk(BIOS_ERR, "%s: Too much data: %zu > %zu\n",
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__func__, expected, buf_len);
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goto out;
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}
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/* Now read the rest of the data */
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current = burstcnt;
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while (current < expected) {
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/* Read updated burst count and check status */
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if (cr50_wait_burst_status(chip, TPM_STS_VALID,
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&burstcnt, &status) < 0)
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goto out;
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if (!(status & TPM_STS_DATA_AVAIL)) {
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printk(BIOS_ERR, "%s: Data not available\n", __func__);
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goto out;
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}
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len = min(burstcnt, expected - current);
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if (iic_tpm_read(addr, buf + current, len) != 0) {
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printk(BIOS_ERR, "%s: Read failed\n", __func__);
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goto out;
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}
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current += len;
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}
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/* Ensure TPM is done reading data */
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if (cr50_wait_burst_status(chip, TPM_STS_VALID, &burstcnt, &status) < 0)
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goto out;
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if (status & TPM_STS_DATA_AVAIL) {
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printk(BIOS_ERR, "%s: Data still available\n", __func__);
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goto out;
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}
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ret = current;
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out:
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return ret;
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}
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static int cr50_tis_i2c_send(struct tpm_chip *chip, uint8_t *buf, size_t len)
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{
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int status;
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size_t burstcnt, limit, sent = 0;
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uint8_t tpm_go[4] = { TPM_STS_GO };
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struct stopwatch sw;
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stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS);
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/* Wait until TPM is ready for a command */
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while (!(cr50_tis_i2c_status(chip) & TPM_STS_COMMAND_READY)) {
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if (stopwatch_expired(&sw)) {
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printk(BIOS_ERR, "%s: Command ready timeout\n",
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__func__);
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return -1;
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}
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cr50_tis_i2c_ready(chip);
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}
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while (len > 0) {
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/* Read burst count and check status */
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if (cr50_wait_burst_status(chip, TPM_STS_VALID,
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&burstcnt, &status) < 0)
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goto out;
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if (sent > 0 && !(status & TPM_STS_DATA_EXPECT)) {
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printk(BIOS_ERR, "%s: Data not expected\n", __func__);
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goto out;
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}
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/* Use burstcnt - 1 to account for the address byte
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* that is inserted by iic_tpm_write() */
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limit = min(burstcnt - 1, len);
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if (iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality),
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&buf[sent], limit) != 0) {
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printk(BIOS_ERR, "%s: Write failed\n", __func__);
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goto out;
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}
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sent += limit;
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len -= limit;
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}
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/* Ensure TPM is not expecting more data */
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if (cr50_wait_burst_status(chip, TPM_STS_VALID, &burstcnt, &status) < 0)
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goto out;
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if (status & TPM_STS_DATA_EXPECT) {
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printk(BIOS_ERR, "%s: Data still expected\n", __func__);
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goto out;
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}
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/* Start the TPM command */
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if (iic_tpm_write(TPM_STS(chip->vendor.locality), tpm_go,
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sizeof(tpm_go)) < 0) {
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printk(BIOS_ERR, "%s: Start command failed\n", __func__);
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goto out;
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}
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return sent;
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out:
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/* Abort current transaction if still pending */
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if (cr50_tis_i2c_status(chip) & TPM_STS_COMMAND_READY)
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cr50_tis_i2c_ready(chip);
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return -1;
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}
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static void cr50_vendor_init(struct tpm_chip *chip)
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{
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memset(&chip->vendor, 0, sizeof(struct tpm_vendor_specific));
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chip->vendor.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID;
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chip->vendor.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID;
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chip->vendor.req_canceled = TPM_STS_COMMAND_READY;
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chip->vendor.status = &cr50_tis_i2c_status;
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chip->vendor.recv = &cr50_tis_i2c_recv;
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chip->vendor.send = &cr50_tis_i2c_send;
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chip->vendor.cancel = &cr50_tis_i2c_ready;
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}
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int tpm_vendor_probe(unsigned bus, uint32_t addr)
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{
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struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev);
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struct stopwatch sw;
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uint8_t buf = 0;
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int ret;
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long sw_run_duration = CR50_TIMEOUT_LONG_MS;
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tpm_dev->bus = bus;
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tpm_dev->addr = addr;
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/* Wait for TPM_ACCESS register ValidSts bit to be set */
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stopwatch_init_msecs_expire(&sw, sw_run_duration);
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do {
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ret = iic_tpm_read(TPM_ACCESS(0), &buf, 1);
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if (!ret && (buf & TPM_STS_VALID)) {
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sw_run_duration = stopwatch_duration_msecs(&sw);
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break;
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}
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mdelay(CR50_TIMEOUT_SHORT_MS);
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} while (!stopwatch_expired(&sw));
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printk(BIOS_INFO,
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"%s: ValidSts bit %s(%d) in TPM_ACCESS register after %ld ms\n",
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__func__, (buf & TPM_STS_VALID) ? "set" : "clear",
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(buf & TPM_STS_VALID) >> 7, sw_run_duration);
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/* Claim failure if the ValidSts (bit 7) is clear */
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if (!(buf & TPM_STS_VALID))
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return -1;
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return 0;
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}
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int tpm_vendor_init(struct tpm_chip *chip, unsigned bus, uint32_t dev_addr)
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{
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struct tpm_inf_dev *tpm_dev = car_get_var_ptr(&g_tpm_dev);
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uint32_t vendor;
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if (dev_addr == 0) {
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printk(BIOS_ERR, "%s: missing device address\n", __func__);
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return -1;
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}
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tpm_dev->bus = bus;
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tpm_dev->addr = dev_addr;
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cr50_vendor_init(chip);
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/* Disable interrupts (not supported) */
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chip->vendor.irq = 0;
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if (request_locality(chip, 0) != 0)
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return -1;
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/* Read four bytes from DID_VID register */
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if (iic_tpm_read(TPM_DID_VID(0), (uint8_t *)&vendor, 4) < 0)
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goto out_err;
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if (vendor != CR50_DID_VID) {
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printk(BIOS_DEBUG, "Vendor ID 0x%08x not recognized\n", vendor);
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goto out_err;
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}
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printk(BIOS_DEBUG, "cr50 TPM %u:%02x (device-id 0x%X)\n",
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tpm_dev->bus, tpm_dev->addr, vendor >> 16);
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chip->is_open = 1;
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return 0;
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out_err:
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release_locality(chip, 0, 1);
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return -1;
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}
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void tpm_vendor_cleanup(struct tpm_chip *chip)
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{
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release_locality(chip, chip->vendor.locality, 1);
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}
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