1b3197efb4
In preparation to follow-up commits, rename the mainboard folder from t440p to haswell, which will have more variants later. Change-Id: I4a9d68d54d5f0821bbf85faaa620855d456c97f3 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63511 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
86 lines
1.9 KiB
C
86 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/io.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <ec/acpi/ec.h>
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#include <ec/lenovo/h8/h8.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#define GPE_EC_SCI 1
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#define GPE_EC_WAKE 13
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static void mainboard_smi_handle_ec_sci(void)
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{
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u8 status = inb(EC_SC);
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u8 event;
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if (!(status & EC_SCI_EVT))
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return;
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event = ec_query();
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printk(BIOS_DEBUG, "EC event %#02x\n", event);
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}
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void mainboard_smi_gpi(u32 gpi_sts)
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{
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if (gpi_sts & (1 << GPE_EC_SCI))
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mainboard_smi_handle_ec_sci();
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}
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/* lynxpoint doesn't have gpi_route_interrupt, so add it */
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#define GPI_DISABLE 0x00
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#define GPI_IS_SMI 0x01
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#define GPI_IS_SCI 0x02
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#define GPI_IS_NMI 0x03
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static void gpi_route_interrupt(u8 gpi, u8 mode)
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{
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u32 gpi_rout;
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gpi_rout = pci_read_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT);
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gpi_rout &= ~(3 << (2 * gpi));
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gpi_rout |= ((mode & 3) << (2 * gpi));
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pci_write_config32(PCI_DEV(0, 0x1f, 0), GPIO_ROUT, gpi_rout);
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}
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int mainboard_smi_apmc(u8 data)
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{
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switch (data) {
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case APM_CNT_ACPI_ENABLE:
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/* use 0x1600/0x1604 to prevent races with userspace */
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ec_set_ports(0x1604, 0x1600);
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/* route EC_SCI to SCI */
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gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
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/* discard all events, and enable attention */
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ec_write(0x80, 0x01);
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break;
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case APM_CNT_ACPI_DISABLE:
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/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
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provide a EC query function */
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ec_set_ports(0x66, 0x62);
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/* route EC_SCI to SMI */
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gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
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/* discard all events, and enable attention */
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ec_write(0x80, 0x01);
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break;
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default:
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break;
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}
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return 0;
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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if (slp_typ == 3) {
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u8 ec_wake = ec_read(0x32);
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/* If EC wake events are enabled,
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* enable wake on EC WAKE GPE. */
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if (ec_wake & 0x14) {
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/* Redirect EC WAKE GPE to SCI. */
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gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
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}
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}
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}
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