1c5071d175
These existed to provide a hook to add reserved memory regions in the coreboot memory table. Reserved memory are now added as resources. Change-Id: I9f83df33845cfa6973b018a51cf9444dbf0f8667 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1414 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
46 lines
802 B
Plaintext
46 lines
802 B
Plaintext
if BOARD_INTEL_EMERALDLAKE2
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select ARCH_X86
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select CPU_INTEL_SOCKET_RPGA989
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select NORTHBRIDGE_INTEL_IVYBRIDGE
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select SOUTHBRIDGE_INTEL_C216
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select SUPERIO_SMSC_SIO1007
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select BOARD_ROMSIZE_KB_8192
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select BOARD_HAS_FADT
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select HAVE_ACPI_RESUME
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select MMCONF_SUPPORT
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select HAVE_SMI_HANDLER
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select GFXUMA
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#select CHROMEOS
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select EXTERNAL_MRC_BLOB
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config MAINBOARD_DIR
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string
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default intel/emeraldlake2
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config MAINBOARD_PART_NUMBER
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string
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default "EMERALD LAKE 2"
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config MMCONF_BASE_ADDRESS
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hex
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default 0xf0000000
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config IRQ_SLOT_COUNT
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int
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default 18
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config MAX_CPUS
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int
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default 16
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config VGA_BIOS_FILE
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string
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default "pci8086,0166.rom"
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endif # BOARD_INTEL_EMERALDLAKE2
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