1cae45432e
Also change some of the types to match the register widths of the controller. It is expected that these prototypes will be used with SMBus host controllers inside AMD chipsets as well, thus the change of location. Change-Id: I88fe834f3eee7b7bfeff02f91a1c25bb5aee9b65 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38226 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
74 lines
2.1 KiB
C
74 lines
2.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <device/pci_def.h>
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#include <southbridge/intel/common/smbus.h>
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#include <device/smbus_host.h>
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#include "pch.h"
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void enable_smbus(void)
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{
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pci_devfn_t dev;
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/* Set the SMBus device statically. */
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dev = PCI_DEV(0x0, 0x1f, 0x3);
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/* Check to make sure we've got the right device. */
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if (pci_read_config16(dev, 0x0) != 0x8086) {
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die("SMBus controller not found!");
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}
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/* Set SMBus I/O base. */
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pci_write_config32(dev, SMB_BASE,
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SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO);
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/* Set SMBus enable. */
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pci_write_config8(dev, HOSTC, HST_EN);
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/* Set SMBus I/O space enable. */
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pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);
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/* Disable interrupt generation. */
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outb(0, SMBUS_IO_BASE + SMBHSTCTL);
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/* Clear any lingering errors, so transactions can run. */
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outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
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printk(BIOS_DEBUG, "SMBus controller enabled.\n");
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}
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int smbus_read_byte(unsigned int device, unsigned int address)
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{
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return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
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}
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int smbus_write_byte(unsigned int device, unsigned int address, u8 data)
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{
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return do_smbus_write_byte(SMBUS_IO_BASE, device, address, data);
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}
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int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf)
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{
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return do_smbus_block_read(SMBUS_IO_BASE, device, cmd, bytes, buf);
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}
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int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, const u8 *buf)
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{
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return do_smbus_block_write(SMBUS_IO_BASE, device, cmd, bytes, buf);
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}
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