1cb9cd5798
Change-Id: I730f80afd8aad250f26534435aec24bea75a849c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
146 lines
2.8 KiB
C
146 lines
2.8 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef CPU_X86_CR_H
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#define CPU_X86_CR_H
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#if !defined(__ASSEMBLER__)
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#include <stdint.h>
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#define COMPILER_BARRIER "memory"
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#ifdef __x86_64__
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#define CRx_TYPE uint64_t
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#define CRx_IN "q"
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#define CRx_RET "=q"
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#else
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#define CRx_TYPE uint32_t
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#define CRx_IN "r"
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#define CRx_RET "=r"
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#endif
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static __always_inline CRx_TYPE read_cr0(void)
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{
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CRx_TYPE value;
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__asm__ __volatile__ (
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"mov %%cr0, %0"
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: CRx_RET(value)
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:
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: COMPILER_BARRIER
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);
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return value;
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}
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static __always_inline void write_cr0(CRx_TYPE data)
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{
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__asm__ __volatile__ (
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"mov %0, %%cr0"
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:
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: CRx_IN(data)
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: COMPILER_BARRIER
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);
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}
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static __always_inline CRx_TYPE read_cr2(void)
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{
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CRx_TYPE value;
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__asm__ __volatile__ (
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"mov %%cr2, %0"
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: CRx_RET(value)
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:
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: COMPILER_BARRIER
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);
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return value;
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}
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static __always_inline CRx_TYPE read_cr3(void)
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{
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CRx_TYPE value;
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__asm__ __volatile__ (
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"mov %%cr3, %0"
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: CRx_RET(value)
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:
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: COMPILER_BARRIER
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);
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return value;
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}
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static __always_inline void write_cr3(CRx_TYPE data)
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{
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__asm__ __volatile__ (
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"mov %0, %%cr3"
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:
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: CRx_IN(data)
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: COMPILER_BARRIER
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);
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}
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static __always_inline CRx_TYPE read_cr4(void)
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{
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CRx_TYPE value;
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__asm__ __volatile__ (
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"mov %%cr4, %0"
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: CRx_RET(value)
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:
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: COMPILER_BARRIER
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);
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return value;
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}
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static __always_inline void write_cr4(CRx_TYPE data)
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{
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__asm__ __volatile__ (
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"mov %0, %%cr4"
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:
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: CRx_IN(data)
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: COMPILER_BARRIER
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);
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}
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#endif /* !defined(__ASSEMBLER__) */
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/* CR0 flags */
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#define CR0_PE (1 << 0)
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#define CR0_MP (1 << 1)
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#define CR0_EM (1 << 2)
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#define CR0_TS (1 << 3)
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#define CR0_ET (1 << 4)
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#define CR0_NE (1 << 5)
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#define CR0_WP (1 << 16)
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#define CR0_AM (1 << 18)
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#define CR0_NW (1 << 29)
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#define CR0_CD (1 << 30)
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#define CR0_PG (1 << 31)
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/* CR4 flags */
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#define CR4_VME (1 << 0)
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#define CR4_PVI (1 << 1)
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#define CR4_TSD (1 << 2)
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#define CR4_DE (1 << 3)
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#define CR4_PSE (1 << 4)
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#define CR4_PAE (1 << 5)
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#define CR4_MCE (1 << 6)
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#define CR4_PGE (1 << 7)
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#define CR4_PCE (1 << 8)
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#define CR4_OSFXSR (1 << 9)
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#define CR4_OSXMMEXCPT (1 << 10)
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#define CR4_VMXE (1 << 13)
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#define CR4_SMXE (1 << 14)
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#define CR4_FSGSBASE (1 << 16)
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#define CR4_PCIDE (1 << 17)
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#define CR4_OSXSAVE (1 << 18)
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#define CR4_SMEP (1 << 20)
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#endif /* CPU_X86_CR_H */
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