1d4bdda47f
All code in southbridge/intel/common is now properly guarded by a Kconfig symbol, making SOUTHBRIDGE_INTEL_COMMON obsolete. Change-Id: Ifeccfaa9534f903e3f3543e1f9f3d5f3345b461e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36438 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
53 lines
1.5 KiB
Plaintext
53 lines
1.5 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2008-2009 coresystems GmbH
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## 2012 secunet security Networks AG
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config SOUTHBRIDGE_INTEL_I82801IX
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bool
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_SPI if !BOARD_EMULATION_QEMU_X86_Q35
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select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
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select SOUTHBRIDGE_INTEL_COMMON_PMBASE
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select SOUTHBRIDGE_INTEL_COMMON_RTC
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select SOUTHBRIDGE_INTEL_COMMON_RESET
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select IOAPIC
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select HAVE_USBDEBUG
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select USE_WATCHDOG_ON_BOOT
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select HAVE_SMI_HANDLER
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select HAVE_USBDEBUG_OPTIONS
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select SOUTHBRIDGE_INTEL_COMMON_GPIO
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select SOUTHBRIDGE_INTEL_COMMON_SMM
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select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
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if SOUTHBRIDGE_INTEL_I82801IX
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config EHCI_BAR
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hex
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default 0xfef00000
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## Some enterprise variants may require an IFD
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config INTEL_DESCRIPTOR_MODE_REQUIRED
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bool
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default n
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config HPET_MIN_TICKS
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hex
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default 0x80
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endif
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