1e0543541e
It's confusing to have these Kconfig symbols for non-Intel boards. Change-Id: I4903c816258e5d2b8ed8704295b777aee175e8bc Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/18795 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
118 lines
3.0 KiB
Plaintext
118 lines
3.0 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright 2013 Google Inc.
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## Copyright 2016-2017 secunet Security Networks AG
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config INTEL_DP
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bool
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default n
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help
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helper functions for intel display port operations
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config INTEL_DDI
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bool
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default n
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help
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helper functions for intel DDI operations
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config INTEL_EDID
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bool
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default n
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config INTEL_INT15
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bool
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default n
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config INTEL_GMA_ACPI
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bool
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default n
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config INTEL_GMA_SSC_ALTERNATE_REF
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bool
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default n
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help
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Set when the SSC reference clock for LVDS runs at a different fre-
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quency than the general display reference clock.
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To be set by northbridge or mainboard Kconfig. For most platforms,
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there is no choice, i.e. for i945 and gm45 the SSC reference always
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differs from the display reference clock (i945: 66Mhz SSC vs. 48MHz
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DREF; gm45: 100MHz SSC vs. 96Mhz DREF), for Nehalem and newer, it's
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the same frequency for SSC/non-SSC (120MHz). The only, currently
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supported platform with a choice seems to be Pineview, where the
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alternative is 100MHz vs. the default 96MHz.
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config GFX_GMA
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def_bool y
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depends on NORTHBRIDGE_INTEL_NEHALEM || NORTHBRIDGE_INTEL_SANDYBRIDGE \
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|| NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_HASWELL \
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|| SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE
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depends on MAINBOARD_HAS_LIBGFXINIT
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if GFX_GMA
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config GFX_GMA_CPU
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string
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default "Skylake" if SOC_INTEL_SKYLAKE
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default "Broadwell" if SOC_INTEL_BROADWELL
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default "Haswell" if NORTHBRIDGE_INTEL_HASWELL
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default "Ivybridge" if NORTHBRIDGE_INTEL_IVYBRIDGE
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default "Sandybridge" if NORTHBRIDGE_INTEL_SANDYBRIDGE
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default "Ironlake" if NORTHBRIDGE_INTEL_NEHALEM
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config GFX_GMA_CPU_VARIANT
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string
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default "ULT" if (SOC_INTEL_SKYLAKE && !SKYLAKE_SOC_PCH_H) || SOC_INTEL_BROADWELL || NORTHBRIDGE_INTEL_HASWELL
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default "Normal"
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config GFX_GMA_INTERNAL_IS_EDP
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bool
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default n if GFX_GMA_INTERNAL_IS_LVDS
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default y
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config GFX_GMA_INTERNAL_IS_LVDS
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bool
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default n
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config GFX_GMA_INTERNAL_PORT
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string
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default "DP" if GFX_GMA_INTERNAL_IS_EDP
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default "LVDS"
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config GFX_GMA_ANALOG_I2C_HDMI_B
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bool
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default n
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config GFX_GMA_ANALOG_I2C_HDMI_C
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bool
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default n
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config GFX_GMA_ANALOG_I2C_HDMI_D
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bool
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default n
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config GFX_GMA_ANALOG_I2C_PORT
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string
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default "PCH_HDMI_B" if GFX_GMA_ANALOG_I2C_HDMI_B
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default "PCH_HDMI_C" if GFX_GMA_ANALOG_I2C_HDMI_C
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default "PCH_HDMI_D" if GFX_GMA_ANALOG_I2C_HDMI_D
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default "PCH_DAC"
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help
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Boards with a DVI-I connector share the I2C pins for both analog and
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digital displays. In that case, the EDID for a VGA display has to be
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read over the I2C interface of the coupled digital port.
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endif
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