1eff77bc59
On Intel SoCs, if TME is supported, TME key ID bits are reserved and
should be subtracted from the maximum physical addresses available.
BUG=288978352
TEST=Verified that DMAR ACPI table `Host Address Width` field on rex
went from 45 to 41.
Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Change-Id: I9504a489782ab6ef8950a8631c269ed39c63f34d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77613
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
18 lines
534 B
Makefile
18 lines
534 B
Makefile
## SPDX-License-Identifier: GPL-2.0-only
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bootblock-$(CONFIG_CPU_INTEL_COMMON) += common_init.c
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romstage-$(CONFIG_CPU_INTEL_COMMON) += common_init.c
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postcar-$(CONFIG_CPU_INTEL_COMMON) += common_init.c
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ramstage-$(CONFIG_CPU_INTEL_COMMON) += common_init.c
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ramstage-$(CONFIG_CPU_INTEL_COMMON) += hyperthreading.c
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ramstage-$(CONFIG_CPU_INTEL_COMMON_VOLTAGE) += voltage.c
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ifeq ($(CONFIG_CPU_INTEL_COMMON_TIMEBASE),y)
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bootblock-y += fsb.c
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verstage-y += fsb.c
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romstage-y += fsb.c
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postcar-y += fsb.c
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ramstage-y += fsb.c
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smm-y += fsb.c
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endif
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