210b83e764
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
137 lines
3.8 KiB
C
137 lines
3.8 KiB
C
/*
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* Ported to Intel XE7501DEVKIT from Agami Aruma
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* written by Stefan Reinauer <stepan@openbios.org>
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* (C) 2005 Stefan Reinauer
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* (C) 2005 Digital Design Corporation
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*/
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#include <console/console.h>
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#include <string.h>
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#include <arch/acpi.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <assert.h>
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#include "bus.h"
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#include "ioapic.h"
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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/* Just a dummy */
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return current;
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}
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unsigned long acpi_fill_slit(unsigned long current)
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{
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// Not implemented
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return current;
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}
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unsigned long acpi_fill_srat(unsigned long current)
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{
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// Not implemented
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return current;
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}
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unsigned long acpi_fill_madt(unsigned long current)
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{
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unsigned int irq_start = 0;
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device_t dev = 0;
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struct resource* res = NULL;
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// SJM: Hard-code CPU LAPIC entries for now
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// Use SourcePoint numbering of processors
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 6);
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 7);
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 0);
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 1);
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// Southbridge IOAPIC
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_ICH3, 0xfec00000, irq_start);
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irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
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// P64H2#2 Bus A IOAPIC
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dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));
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if (!dev)
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BUG(); // Config.lb error?
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_2_BUS_A, res->base, irq_start);
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irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
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// P64H2#2 Bus B IOAPIC
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dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));
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if (!dev)
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BUG(); // Config.lb error?
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_2_BUS_B, res->base, irq_start);
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irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
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// P64H2#1 Bus A IOAPIC
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dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));
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if (!dev)
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BUG(); // Config.lb error?
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_1_BUS_A, res->base, irq_start);
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irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
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// P64H2#1 Bus B IOAPIC
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dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));
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if (!dev)
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BUG(); // Config.lb error?
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_1_BUS_B, res->base, irq_start);
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irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
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// Map ISA IRQ 0 to IRQ 2
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 1, 0, 2, 0);
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// IRQ9 differs from ISA standard - ours is active high, level-triggered
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 0, 9, 9, 0xD);
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return current;
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}
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unsigned long write_acpi_tables(unsigned long start)
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{
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unsigned long current;
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acpi_rsdp_t *rsdp;
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acpi_rsdt_t *rsdt;
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acpi_madt_t *madt;
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/* Align ACPI tables to 16byte */
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start = ( start + 0x0f ) & -0x10;
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current = start;
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printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
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/* We need at least an RSDP and an RSDT Table */
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rsdp = (acpi_rsdp_t *) current;
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current += sizeof(acpi_rsdp_t);
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rsdt = (acpi_rsdt_t *) current;
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current += sizeof(acpi_rsdt_t);
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/* clear all table memory */
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memset((void *)start, 0, current - start);
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acpi_write_rsdp(rsdp, rsdt);
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acpi_write_rsdt(rsdt);
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/*
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* We explicitly add these tables later on:
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*/
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/* QNX wants an MADT */
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printk_debug("ACPI: * MADT\n");
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madt = (acpi_madt_t *) current;
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acpi_create_madt(madt);
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current+=madt->header.length;
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acpi_add_table(rsdt,madt);
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printk_info("ACPI: done.\n");
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return current;
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}
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