Files
system76-coreboot/src/mainboard/google/reef/acpi/chromeos.asl
Susendra Selvaraj ab88c7d366 google/reef: Write protect GPIO relative to bank offset
Update the write protect GPIO reported in ACPI to GPIO_75.
Also update the controller ID to "INT3452:01" which will
point at the goldmont device and includes write protect GPIO.

BUG=chrome-os-partner:55604
BRANCH=none
TEST=verify crossystem output for wpsw_cur.

Change-Id: Ibe6a013aaab18bfa2436698298177218ca934fab
Signed-off-by: Susendra Selvaraj <susendra.selvaraj@intel.com>
Reviewed-on: https://coreboot.intel.com/7929
Reviewed-by: Petrov, Andrey <andrey.petrov@intel.com>
Tested-by: Petrov, Andrey <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15691
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-07-28 23:06:10 +02:00

24 lines
779 B
Plaintext

/*
* This file is part of the coreboot project.
*
* Copyright 2016 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <soc/gpio_defs.h>
Name (OIPG, Package () {
/* No physical recovery GPIO. */
Package () { 0x0001, 0, 0xFFFFFFFF, "INT3452:01" },
/* Firmware write protect GPIO. */
Package () { 0x0003, 1, PAD_NW(GPIO_75), "INT3452:01" },
})