Duncan Laurie 218a6864ff Add Intel Whitetip Mountain 1 mainboard ...

Lots of things are still placeholder and need work.

Due to the useful GPIOs being run to either the EC or the SIO1007
I have hard coded developer mode on and recovery mode off.

Change-Id: I4c308bd90db03ac5bffdfde566e5adbbaabac632
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2724
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

2013-03-17 22:52:32 +01:00

..

arch

Google Link: Add remaining code to support native graphics

2013-03-15 20:21:51 +01:00

console

Eliminate do_div().

2013-03-08 23:14:26 +01:00

cpu

Google Link: Add remaining code to support native graphics

2013-03-15 20:21:51 +01:00

device

Google Link: Add remaining code to support native graphics

2013-03-15 20:21:51 +01:00

drivers

GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«

2013-03-01 10:16:08 +01:00

ec

Support ITE IT8518 embedded controller running Quanta's firmware

2013-03-14 04:54:21 +01:00

include

stddef.h: Add standard defines for KiB, MiB, GiB, and TiB

2013-03-16 16:15:01 +01:00

lib

Eliminate do_div().

2013-03-08 23:14:26 +01:00

mainboard

Add Intel Whitetip Mountain 1 mainboard

2013-03-17 22:52:32 +01:00

northbridge

haswell: include TSEG region in cacheable memory

2013-03-17 20:05:15 +01:00

southbridge

bd82x6x: Add config option to force SATA link to different speeds.

2013-03-17 22:51:48 +01:00

superio

Super I/O W83627DHG: Enable UART B by redirecting pins

2013-03-15 17:51:48 +01:00

vendorcode

google/snow: rename a file so that it is clear what board it is for

2013-03-16 04:07:35 +01:00

Kconfig

bump SeaBIOS to 1.7.2.1

2013-03-04 11:00:17 +01:00