21a4053fde
When CONFIG_SEPARATE_VERSTAGE=n, all verstage code gets linked into the appropriate calling stage (bootblock or romstage). This means that ENV_VERSTAGE is actually 0, and instead ENV_BOOTBLOCK or ENV_ROMSTAGE are 1. This keeps tripping up people who are just trying to write a simple "are we in verstage (i.e. wherever the vboot init logic runs)" check, e.g. for TPM init functions which may run in "verstage" or ramstage depending on whether vboot is enabled. Those checks will not work as intended for CONFIG_SEPARATE_VERSTAGE=n. This patch renames ENV_VERSTAGE to ENV_SEPARATE_VERSTAGE to try to clarify that this macro can really only be used to check whether code is running in a *separate* verstage, and clue people in that they may need to cover the linked-in verstage case as well. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I2ff3a3c3513b3db44b3cff3d93398330cd3632ea Reviewed-on: https://review.coreboot.org/c/coreboot/+/40582 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
114 lines
2.8 KiB
C
114 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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#include <arch/acpi.h>
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#include <boot/coreboot_tables.h>
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#include <gpio.h>
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#include <soc/gpio.h>
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#include <variant/gpio.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <security/tpm/tss.h>
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#include <device/device.h>
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#include <intelblocks/pmclib.h>
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#include <soc/pmc.h>
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#include <soc/pci_devs.h>
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enum rec_mode_state {
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REC_MODE_UNINITIALIZED,
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REC_MODE_NOT_REQUESTED,
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REC_MODE_REQUESTED,
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};
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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struct lb_gpio chromeos_gpios[] = {
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{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
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{-1, ACTIVE_HIGH, 0, "power"},
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{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
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{-1, ACTIVE_HIGH, 0, "EC in RW"},
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};
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lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
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}
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static int cros_get_gpio_value(int type)
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{
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const struct cros_gpio *cros_gpios;
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size_t i, num_gpios = 0;
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cros_gpios = variant_cros_gpios(&num_gpios);
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for (i = 0; i < num_gpios; i++) {
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const struct cros_gpio *gpio = &cros_gpios[i];
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if (gpio->type == type) {
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int state = gpio_get(gpio->gpio_num);
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if (gpio->polarity == CROS_GPIO_ACTIVE_LOW)
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return !state;
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else
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return state;
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}
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}
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return 0;
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}
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void mainboard_chromeos_acpi_generate(void)
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{
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const struct cros_gpio *cros_gpios;
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size_t num_gpios = 0;
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cros_gpios = variant_cros_gpios(&num_gpios);
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chromeos_acpi_gpio_generate(cros_gpios, num_gpios);
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}
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int get_write_protect_state(void)
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{
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return cros_get_gpio_value(CROS_GPIO_WP);
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}
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int get_recovery_mode_switch(void)
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{
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static enum rec_mode_state saved_rec_mode = REC_MODE_UNINITIALIZED;
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enum rec_mode_state state = REC_MODE_NOT_REQUESTED;
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uint8_t cr50_state = 0;
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/* Check cached state, since TPM will only tell us the first time */
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if (saved_rec_mode != REC_MODE_UNINITIALIZED)
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return saved_rec_mode == REC_MODE_REQUESTED;
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/*
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* Read one-time recovery request from cr50 in verstage only since
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* the TPM driver won't be set up in time for other stages like romstage
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* and the value from the TPM would be wrong anyway since the verstage
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* read would have cleared the value on the TPM.
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*
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* The TPM recovery request is passed between stages through vboot data
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* or cbmem depending on stage.
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*/
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if (ENV_SEPARATE_VERSTAGE &&
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tlcl_cr50_get_recovery_button(&cr50_state) == TPM_SUCCESS &&
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cr50_state)
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state = REC_MODE_REQUESTED;
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/* Read state from the GPIO controlled by servo. */
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if (cros_get_gpio_value(CROS_GPIO_REC))
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state = REC_MODE_REQUESTED;
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/* Store the state in case this is called again in verstage. */
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saved_rec_mode = state;
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return state == REC_MODE_REQUESTED;
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}
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int get_lid_switch(void)
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{
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return 1;
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}
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void mainboard_prepare_cr50_reset(void)
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{
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#if ENV_RAMSTAGE
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/* Ensure system powers up after CR50 reset */
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pmc_soc_set_afterg3_en(true);
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#endif
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}
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