23547ddb94
With these changes we have a mostly compiling target. I'm still removing and pruning .h files, but hopefully later today I'll do the last few .h commits and move on to .c Change-Id: Ia82d787496184e028f37d7b67336d61fda75aa94 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/1937 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
483 lines
7.7 KiB
C
483 lines
7.7 KiB
C
/*
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* (C) Copyright 2010 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef EXYNOS5250_GPIO_H_
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#define EXYNOS5250_GPIO_H_
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#include <cpu/samsung/exynos5-common/gpio.h>
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struct exynos5_gpio_part1 {
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struct s5p_gpio_bank a0;
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struct s5p_gpio_bank a1;
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struct s5p_gpio_bank a2;
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struct s5p_gpio_bank b0;
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struct s5p_gpio_bank b1;
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struct s5p_gpio_bank b2;
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struct s5p_gpio_bank b3;
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struct s5p_gpio_bank c0;
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struct s5p_gpio_bank c1;
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struct s5p_gpio_bank c2;
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struct s5p_gpio_bank c3;
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struct s5p_gpio_bank d0;
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struct s5p_gpio_bank d1;
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struct s5p_gpio_bank y0;
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struct s5p_gpio_bank y1;
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struct s5p_gpio_bank y2;
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struct s5p_gpio_bank y3;
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struct s5p_gpio_bank y4;
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struct s5p_gpio_bank y5;
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struct s5p_gpio_bank y6;
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};
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struct exynos5_gpio_part2 {
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struct s5p_gpio_bank x0;
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struct s5p_gpio_bank x1;
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struct s5p_gpio_bank x2;
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struct s5p_gpio_bank x3;
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};
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struct exynos5_gpio_part3 {
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struct s5p_gpio_bank e0;
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struct s5p_gpio_bank e1;
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struct s5p_gpio_bank f0;
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struct s5p_gpio_bank f1;
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struct s5p_gpio_bank g0;
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struct s5p_gpio_bank g1;
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struct s5p_gpio_bank g2;
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struct s5p_gpio_bank h0;
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struct s5p_gpio_bank h1;
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};
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struct exynos5_gpio_part4 {
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struct s5p_gpio_bank v0;
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struct s5p_gpio_bank v1;
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struct s5p_gpio_bank v2;
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struct s5p_gpio_bank v3;
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};
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struct exynos5_gpio_part5 {
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struct s5p_gpio_bank v4;
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};
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struct exynos5_gpio_part6 {
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struct s5p_gpio_bank z;
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};
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enum {
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/* GPIO banks are split into this many parts */
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EXYNOS_GPIO_NUM_PARTS = 6
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};
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/* A list of valid GPIO numbers for the asm-generic/gpio.h interface */
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enum exynos5_gpio_pin {
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/* GPIO_PART1_STARTS */
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GPIO_A00,
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GPIO_A01,
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GPIO_A02,
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GPIO_A03,
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GPIO_A04,
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GPIO_A05,
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GPIO_A06,
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GPIO_A07,
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GPIO_A10,
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GPIO_A11,
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GPIO_A12,
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GPIO_A13,
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GPIO_A14,
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GPIO_A15,
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GPIO_A16,
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GPIO_A17,
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GPIO_A20,
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GPIO_A21,
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GPIO_A22,
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GPIO_A23,
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GPIO_A24,
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GPIO_A25,
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GPIO_A26,
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GPIO_A27,
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GPIO_B00, /* 0x18 */
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GPIO_B01,
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GPIO_B02,
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GPIO_B03,
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GPIO_B04,
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GPIO_B05,
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GPIO_B06,
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GPIO_B07,
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GPIO_B10,
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GPIO_B11,
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GPIO_B12,
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GPIO_B13,
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GPIO_B14,
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GPIO_B15,
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GPIO_B16,
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GPIO_B17,
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GPIO_B20,
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GPIO_B21,
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GPIO_B22,
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GPIO_B23,
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GPIO_B24,
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GPIO_B25,
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GPIO_B26,
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GPIO_B27,
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GPIO_B30,
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GPIO_B31,
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GPIO_B32,
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GPIO_B33,
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GPIO_B34,
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GPIO_B35,
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GPIO_B36,
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GPIO_B37,
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GPIO_C00, /* 0x38 */
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GPIO_C01,
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GPIO_C02,
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GPIO_C03,
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GPIO_C04,
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GPIO_C05,
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GPIO_C06,
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GPIO_C07,
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GPIO_C10,
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GPIO_C11,
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GPIO_C12,
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GPIO_C13,
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GPIO_C14,
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GPIO_C15,
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GPIO_C16,
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GPIO_C17,
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GPIO_C20,
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GPIO_C21,
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GPIO_C22,
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GPIO_C23,
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GPIO_C24,
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GPIO_C25,
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GPIO_C26,
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GPIO_C27,
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GPIO_C30,
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GPIO_C31,
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GPIO_C32,
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GPIO_C33,
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GPIO_C34,
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GPIO_C35,
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GPIO_C36,
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GPIO_C37,
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GPIO_D00, /* 0x58 */
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GPIO_D01,
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GPIO_D02,
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GPIO_D03,
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GPIO_D04,
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GPIO_D05,
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GPIO_D06,
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GPIO_D07,
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GPIO_D10,
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GPIO_D11,
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GPIO_D12,
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GPIO_D13,
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GPIO_D14,
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GPIO_D15,
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GPIO_D16,
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GPIO_D17,
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GPIO_Y00, /* 0x68 */
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GPIO_Y01,
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GPIO_Y02,
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GPIO_Y03,
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GPIO_Y04,
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GPIO_Y05,
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GPIO_Y06,
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GPIO_Y07,
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GPIO_Y10,
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GPIO_Y11,
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GPIO_Y12,
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GPIO_Y13,
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GPIO_Y14,
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GPIO_Y15,
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GPIO_Y16,
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GPIO_Y17,
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GPIO_Y20,
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GPIO_Y21,
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GPIO_Y22,
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GPIO_Y23,
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GPIO_Y24,
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GPIO_Y25,
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GPIO_Y26,
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GPIO_Y27,
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GPIO_Y30,
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GPIO_Y31,
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GPIO_Y32,
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GPIO_Y33,
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GPIO_Y34,
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GPIO_Y35,
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GPIO_Y36,
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GPIO_Y37,
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GPIO_Y40,
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GPIO_Y41,
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GPIO_Y42,
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GPIO_Y43,
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GPIO_Y44,
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GPIO_Y45,
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GPIO_Y46,
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GPIO_Y47,
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GPIO_Y50,
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GPIO_Y51,
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GPIO_Y52,
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GPIO_Y53,
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GPIO_Y54,
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GPIO_Y55,
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GPIO_Y56,
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GPIO_Y57,
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GPIO_Y60,
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GPIO_Y61,
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GPIO_Y62,
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GPIO_Y63,
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GPIO_Y64,
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GPIO_Y65,
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GPIO_Y66,
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GPIO_Y67,
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/* GPIO_PART2_STARTS */
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GPIO_MAX_PORT_PART_1,
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GPIO_X00 = GPIO_MAX_PORT_PART_1, /* 0xa0 */
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GPIO_X01,
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GPIO_X02,
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GPIO_X03,
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GPIO_X04,
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GPIO_X05,
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GPIO_X06,
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GPIO_X07,
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GPIO_X10,
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GPIO_X11,
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GPIO_X12,
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GPIO_X13,
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GPIO_X14,
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GPIO_X15,
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GPIO_X16,
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GPIO_X17,
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GPIO_X20,
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GPIO_X21,
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GPIO_X22,
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GPIO_X23,
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GPIO_X24,
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GPIO_X25,
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GPIO_X26,
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GPIO_X27,
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GPIO_X30,
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GPIO_X31,
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GPIO_X32,
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GPIO_X33,
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GPIO_X34,
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GPIO_X35,
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GPIO_X36,
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GPIO_X37,
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/* GPIO_PART3_STARTS */
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GPIO_MAX_PORT_PART_2,
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GPIO_E00 = GPIO_MAX_PORT_PART_2, /* 0xc0 */
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GPIO_E01,
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GPIO_E02,
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GPIO_E03,
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GPIO_E04,
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GPIO_E05,
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GPIO_E06,
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GPIO_E07,
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GPIO_E10,
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GPIO_E11,
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GPIO_E12,
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GPIO_E13,
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GPIO_E14,
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GPIO_E15,
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GPIO_E16,
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GPIO_E17,
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GPIO_F00, /* 0xd0 */
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GPIO_F01,
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GPIO_F02,
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GPIO_F03,
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GPIO_F04,
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GPIO_F05,
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GPIO_F06,
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GPIO_F07,
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GPIO_F10,
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GPIO_F11,
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GPIO_F12,
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GPIO_F13,
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GPIO_F14,
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GPIO_F15,
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GPIO_F16,
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GPIO_F17,
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GPIO_G00,
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GPIO_G01,
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GPIO_G02,
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GPIO_G03,
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GPIO_G04,
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GPIO_G05,
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GPIO_G06,
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GPIO_G07,
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GPIO_G10,
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GPIO_G11,
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GPIO_G12,
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GPIO_G13,
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GPIO_G14,
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GPIO_G15,
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GPIO_G16,
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GPIO_G17,
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GPIO_G20,
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GPIO_G21,
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GPIO_G22,
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GPIO_G23,
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GPIO_G24,
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GPIO_G25,
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GPIO_G26,
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GPIO_G27,
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GPIO_H00,
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GPIO_H01,
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GPIO_H02,
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GPIO_H03,
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GPIO_H04,
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GPIO_H05,
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GPIO_H06,
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GPIO_H07,
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GPIO_H10,
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GPIO_H11,
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GPIO_H12,
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GPIO_H13,
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GPIO_H14,
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GPIO_H15,
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GPIO_H16,
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GPIO_H17,
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/* GPIO_PART4_STARTS */
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GPIO_MAX_PORT_PART_3,
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GPIO_V00 = GPIO_MAX_PORT_PART_3,
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GPIO_V01,
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GPIO_V02,
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GPIO_V03,
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GPIO_V04,
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GPIO_V05,
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GPIO_V06,
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GPIO_V07,
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GPIO_V10,
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GPIO_V11,
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GPIO_V12,
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GPIO_V13,
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GPIO_V14,
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GPIO_V15,
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GPIO_V16,
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GPIO_V17,
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GPIO_V20,
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GPIO_V21,
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GPIO_V22,
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GPIO_V23,
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GPIO_V24,
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GPIO_V25,
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GPIO_V26,
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GPIO_V27,
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GPIO_V30,
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GPIO_V31,
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GPIO_V32,
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GPIO_V33,
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GPIO_V34,
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GPIO_V35,
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GPIO_V36,
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GPIO_V37,
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/* GPIO_PART5_STARTS */
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GPIO_MAX_PORT_PART_4,
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GPIO_V40 = GPIO_MAX_PORT_PART_4,
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GPIO_V41,
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GPIO_V42,
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GPIO_V43,
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GPIO_V44,
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GPIO_V45,
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GPIO_V46,
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GPIO_V47,
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/* GPIO_PART6_STARTS */
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GPIO_MAX_PORT_PART_5,
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GPIO_Z0 = GPIO_MAX_PORT_PART_5,
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GPIO_Z1,
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GPIO_Z2,
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GPIO_Z3,
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GPIO_Z4,
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GPIO_Z5,
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GPIO_Z6,
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GPIO_MAX_PORT
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};
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#define gpio_status gpio_info
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/**
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* Set GPIO pin configuration.
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*
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* @param gpio GPIO pin
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* @param cfg Either GPIO_INPUT, GPIO_OUTPUT, or GPIO_IRQ
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*/
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void gpio_cfg_pin(int gpio, int cfg);
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/**
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* Set GPIO pull mode.
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*
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* @param gpio GPIO pin
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* @param mode Either GPIO_PULL_DOWN or GPIO_PULL_UP
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*/
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void gpio_set_pull(int gpio, int mode);
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/**
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* Set GPIO drive strength level.
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*
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* @param gpio GPIO pin
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* @param mode Either GPIO_DRV_1X, GPIO_DRV_2X, GPIO_DRV_3X, or GPIO_DRV_4X
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*/
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void gpio_set_drv(int gpio, int mode);
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/**
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* Set GPIO drive rate.
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*
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* @param gpio GPIO pin
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* @param mode Either GPIO_DRV_FAST or GPIO_DRV_SLOW
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*/
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void gpio_set_rate(int gpio, int mode);
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/* FIXME(dhendrix) use generic arch/gpio.h API instead */
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//int gpio_direction_input(unsigned gpio);
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//int gpio_direction_output(unsigned gpio, int value);
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/**
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* Decode a list of GPIOs into an integer.
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*
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* TODO(sjg@chromium.org): This could perhaps become a generic function?
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*
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* Each GPIO pin can be put into three states using external resistors:
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* - pulled up
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* - pulled down
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* - not connected
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*
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* Read each GPIO in turn to produce an integer value. The first GPIO
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* produces a number 1 * (0 to 2), the second produces 3 * (0 to 2), etc.
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* In this way, each GPIO increases the number of possible states by a
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* factor of 3.
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*
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* @param gpio_list List of GPIO numbers to decode
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* @param count Number of GPIOs in list
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* @return -1 if the value cannot be determined, or any GPIO number is
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* invalid. Otherwise returns the calculated value
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*/
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int gpio_decode_number(unsigned gpio_list[], int count);
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void gpio_info(void);
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#endif /* EXYNOS5250_GPIO_H_ */
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