26f297e981
Change-Id: If973f28931e65a57cbb8d6739542a57c844f0d66 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7115 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
133 lines
4.4 KiB
C
133 lines
4.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "AGESA.h"
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#include "amdlib.h"
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#include <northbridge/amd/agesa/BiosCallOuts.h>
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#include "heapManager.h"
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#include "SB800.h"
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#include <stdlib.h>
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/* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess?
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*
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* Board is known to have some issues with integrated NIC and
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* might need implementation to drive some GPIOs.
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*/
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static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
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const BIOS_CALLOUT_STRUCT BiosCallouts[] =
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{
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{AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
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{AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
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{AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
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{AGESA_DO_RESET, agesa_Reset },
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{AGESA_READ_SPD, agesa_ReadSpd },
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{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
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{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
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{AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
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{AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit },
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{AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
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{AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported },
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};
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const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
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/* Call the host environment interface to provide a user hook opportunity. */
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static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
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{
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AGESA_STATUS Status;
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UINTN FcnData;
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MEM_DATA_STRUCT *MemData;
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UINT32 AcpiMmioAddr;
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UINT32 GpioMmioAddr;
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UINT8 Data8;
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UINT16 Data16;
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UINT8 TempData8;
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FcnData = Data;
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MemData = ConfigPtr;
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Status = AGESA_SUCCESS;
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/* Get SB800 MMIO Base (AcpiMmioAddr) */
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WriteIo8 (0xCD6, 0x27);
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Data8 = ReadIo8(0xCD7);
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Data16 = Data8<<8;
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WriteIo8 (0xCD6, 0x26);
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Data8 = ReadIo8(0xCD7);
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Data16 |= Data8;
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AcpiMmioAddr = (UINT32)Data16 << 16;
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GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
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Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
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Data8 &= ~BIT5;
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TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
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TempData8 &= 0x03;
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TempData8 |= Data8;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
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Data8 |= BIT2+BIT3;
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Data8 &= ~BIT4;
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TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
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TempData8 &= 0x23;
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TempData8 |= Data8;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
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Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
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Data8 &= ~BIT5;
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TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
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TempData8 &= 0x03;
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TempData8 |= Data8;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
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Data8 |= BIT2+BIT3;
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Data8 &= ~BIT4;
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TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
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TempData8 &= 0x23;
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TempData8 |= Data8;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
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switch(MemData->ParameterListPtr->DDR3Voltage){
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case VOLT1_35:
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Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
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Data8 &= ~(UINT8)BIT6;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
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Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
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Data8 |= (UINT8)BIT6;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
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break;
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case VOLT1_25:
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Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
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Data8 &= ~(UINT8)BIT6;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
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Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
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Data8 &= ~(UINT8)BIT6;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
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break;
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case VOLT1_5:
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default:
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Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
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Data8 |= (UINT8)BIT6;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
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Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
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Data8 &= ~(UINT8)BIT6;
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Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
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}
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// disable memory clear for boot time reduction
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MemData->ParameterListPtr->EnableMemClr = FALSE;
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return Status;
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}
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