27f340e777
IRQ programming should be done outside (obsolete) MP table generation. Change-Id: Ibce2af4de91549c4c9743cd997f625164672a713 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38564 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Mike Banon <mikebdp2@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
143 lines
4.1 KiB
C
143 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/smp/mpspec.h>
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#include <arch/ioapic.h>
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#include <string.h>
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#include <stdint.h>
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#include <southbridge/amd/common/amd_pci_util.h>
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#include <southbridge/amd/agesa/hudson/hudson.h>
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static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned int length)
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{
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mc->mpc_length += length;
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mc->mpc_entry_count++;
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}
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static void my_smp_write_bus(struct mp_config_table *mc,
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unsigned char id, const char *bustype)
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{
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struct mpc_config_bus *mpc;
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mpc = smp_next_mpc_entry(mc);
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memset(mpc, '\0', sizeof(*mpc));
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mpc->mpc_type = MP_BUS;
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mpc->mpc_busid = id;
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memcpy(mpc->mpc_bustype, bustype, sizeof(mpc->mpc_bustype));
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smp_add_mpc_entry(mc, sizeof(*mpc));
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}
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static void *smp_write_config_table(void *v)
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{
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struct mp_config_table *mc;
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int bus_isa;
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/*
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* By the time this function gets called, the IOAPIC registers
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* have been written so they can be read to get the correct
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* APIC ID and Version
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*/
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u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
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u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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mptable_init(mc, LOCAL_APIC_ADDR);
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memcpy(mc->mpc_oem, "AMD ", 8);
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smp_write_processors(mc);
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//mptable_write_buses(mc, NULL, &bus_isa);
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my_smp_write_bus(mc, 0, "PCI ");
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my_smp_write_bus(mc, 1, "PCI ");
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bus_isa = 0x02;
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my_smp_write_bus(mc, bus_isa, "ISA ");
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/* I/O APICs: APIC ID Version State Address */
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smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
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/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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#define IO_LOCAL_INT(type, intr, apicid, pin) \
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smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));
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mptable_add_isa_interrupts(mc, bus_isa, ioapic_id, 0);
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/* PCI interrupts are level triggered, and are
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* associated with a specific bus/device/function tuple.
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*/
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#define PCI_INT(bus, dev, int_sign, pin) \
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
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/* Internal VGA */
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PCI_INT(0x0, 0x01, 0x0, intr_data_ptr[0x02]);
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PCI_INT(0x0, 0x01, 0x1, intr_data_ptr[0x03]);
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/* SMBUS */
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PCI_INT(0x0, 0x14, 0x0, 0x10);
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/* HD Audio */
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PCI_INT(0x0, 0x14, 0x0, intr_data_ptr[0x13]);
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/* USB */
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PCI_INT(0x0, 0x12, 0x0, intr_data_ptr[0x30]);
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PCI_INT(0x0, 0x12, 0x1, intr_data_ptr[0x31]);
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PCI_INT(0x0, 0x13, 0x0, intr_data_ptr[0x32]);
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PCI_INT(0x0, 0x13, 0x1, intr_data_ptr[0x33]);
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PCI_INT(0x0, 0x16, 0x0, intr_data_ptr[0x34]);
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PCI_INT(0x0, 0x16, 0x1, intr_data_ptr[0x35]);
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PCI_INT(0x0, 0x14, 0x2, intr_data_ptr[0x36]);
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/* sata */
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PCI_INT(0x0, 0x11, 0x0, intr_data_ptr[0x40]);
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PCI_INT(0x0, 0x11, 0x0, intr_data_ptr[0x41]);
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/* on board NIC & Slot PCIE. */
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/* PCI slots */
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struct device *dev = pcidev_on_root(0x14, 4);
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if (dev && dev->enabled) {
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u8 bus_pci = dev->link_list->secondary;
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/* PCI_SLOT 0. */
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PCI_INT(bus_pci, 0x5, 0x0, 0x14);
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PCI_INT(bus_pci, 0x5, 0x1, 0x15);
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PCI_INT(bus_pci, 0x5, 0x2, 0x16);
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PCI_INT(bus_pci, 0x5, 0x3, 0x17);
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/* PCI_SLOT 1. */
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PCI_INT(bus_pci, 0x6, 0x0, 0x15);
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PCI_INT(bus_pci, 0x6, 0x1, 0x16);
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PCI_INT(bus_pci, 0x6, 0x2, 0x17);
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PCI_INT(bus_pci, 0x6, 0x3, 0x14);
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/* PCI_SLOT 2. */
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PCI_INT(bus_pci, 0x7, 0x0, 0x16);
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PCI_INT(bus_pci, 0x7, 0x1, 0x17);
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PCI_INT(bus_pci, 0x7, 0x2, 0x14);
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PCI_INT(bus_pci, 0x7, 0x3, 0x15);
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}
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/* PCIe Lan*/
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PCI_INT(0x0, 0x06, 0x0, 0x13);
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/* FCH PCIe PortA */
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PCI_INT(0x0, 0x15, 0x0, 0x10);
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/* FCH PCIe PortB */
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PCI_INT(0x0, 0x15, 0x1, 0x11);
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/* FCH PCIe PortC */
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PCI_INT(0x0, 0x15, 0x2, 0x12);
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/* FCH PCIe PortD */
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PCI_INT(0x0, 0x15, 0x3, 0x13);
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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IO_LOCAL_INT(mp_ExtINT, 0, MP_APIC_ALL, 0x0);
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IO_LOCAL_INT(mp_NMI, 0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* Compute the checksums */
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return mptable_finalize(mc);
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}
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unsigned long write_smp_table(unsigned long addr)
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{
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void *v;
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v = smp_write_floating_table(addr, 0);
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return (unsigned long)smp_write_config_table(v);
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}
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