VBOOT_VERIFY_FIRMWARE should be independent of CHROMEOS. This allows use of verified boot library without having to stick to CHROMEOS. BUG=chrome-os-partner:55639 Change-Id: Ia2c328712caedd230ab295b8a613e3c1ed1532d9 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15867 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
306 lines
8.4 KiB
C
306 lines
8.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/mmu.h>
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#include <boardid.h>
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#include <bootmode.h>
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#include <boot/coreboot_tables.h>
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#include <cbmem.h>
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#include <delay.h>
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#include <device/device.h>
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#include <device/i2c.h>
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#include <elog.h>
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#include <memrange.h>
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#include <soc/addressmap.h>
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#include <soc/clk_rst.h>
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#include <soc/clock.h>
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#include <soc/funitcfg.h>
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#include <soc/nvidia/tegra/i2c.h>
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#include <soc/padconfig.h>
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#include <soc/nvidia/tegra/dc.h>
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#include <soc/display.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <vendorcode/google/chromeos/cros_vpd.h>
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#if IS_ENABLED(CONFIG_CHROMEOS)
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#include <vboot_struct.h>
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#include <vboot/misc.h>
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#include <vboot/vboot_common.h>
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#endif
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#include "gpio.h"
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#include "pmic.h"
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static const struct pad_config mmcpads[] = {
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/* MMC4 (eMMC) */
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PAD_CFG_SFIO(SDMMC4_CLK, PINMUX_INPUT_ENABLE|PINMUX_PULL_DOWN, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_CMD, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT0, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT1, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT2, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT3, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT4, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT5, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT6, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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PAD_CFG_SFIO(SDMMC4_DAT7, PINMUX_INPUT_ENABLE|PINMUX_PULL_UP, SDMMC4),
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};
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static const struct pad_config audio_codec_pads[] = {
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/* H1 is CODEC_RST_L and R2(ROW2) is AUDIO_ENABLE */
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PAD_CFG_GPIO_OUT1(GPIO_PH1, PINMUX_PULL_DOWN),
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PAD_CFG_GPIO_OUT1(KB_ROW2, PINMUX_PULL_DOWN),
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};
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static const struct funit_cfg funits[] = {
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/* MMC on SDMMC4 controller at 48MHz. */
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FUNIT_CFG(SDMMC4, PLLP, 48000, mmcpads, ARRAY_SIZE(mmcpads)),
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/* I2C6 for audio, temp sensor, etc. Enable codec via GPIOs/muxes */
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FUNIT_CFG(I2C6, PLLP, 400, audio_codec_pads, ARRAY_SIZE(audio_codec_pads)),
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FUNIT_CFG_USB(USBD),
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};
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/* HACK: For proto boards before proto3, we want to disable ec sw sync */
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static void fix_ec_sw_sync(void)
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{
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#if IS_ENABLED(CONFIG_CHROMEOS)
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struct vboot_handoff *vh;
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if (board_id() >= BOARD_ID_PROTO_3)
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return;
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vh = cbmem_find(CBMEM_ID_VBOOT_HANDOFF);
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if (vh == NULL) {
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printk(BIOS_ERR, "No vboot handoff struct found\n");
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return;
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}
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VbSharedDataHeader *vb_sd = (VbSharedDataHeader *)vh->shared_data;
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vb_sd->flags &= ~VBSD_EC_SOFTWARE_SYNC;
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#endif
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}
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static const struct pad_config lcd_gpio_padcfgs[] = {
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/* LCD_EN */
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PAD_CFG_GPIO_OUT0(GPIO_PH5, PINMUX_PULL_UP),
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/* LCD_RST_L */
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PAD_CFG_GPIO_OUT0(GPIO_PH3, PINMUX_PULL_UP),
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/* EN_VDD_LCD */
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PAD_CFG_GPIO_OUT0(GPIO_PBB6, PINMUX_PULL_NONE),
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/* EN_VDD18_LCD */
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PAD_CFG_GPIO_OUT0(DVFS_PWM, PINMUX_PULL_DOWN),
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};
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static void configure_display_clocks(void)
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{
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u32 lclks = CLK_L_HOST1X | CLK_L_DISP1; /* dc */
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u32 hclks = CLK_H_MIPI_CAL | CLK_H_DSI; /* mipi phy, mipi-dsi a */
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u32 uclks = CLK_U_DSIB; /* mipi-dsi b */
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u32 xclks = CLK_X_CLK72MHZ; /* clk src of mipi_cal */
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clock_enable_clear_reset(lclks, hclks, uclks, 0, 0, xclks);
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/* Give clocks time to stabilize. */
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udelay(IO_STABILIZATION_DELAY);
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}
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static int enable_lcd_vdd(void)
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{
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uint8_t data;
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/* Set 1.20V to power AVDD_DSI_CSI */
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pmic_write_reg(I2CPWR_BUS, TI65913_LDO5_VOLTAGE,
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VSEL_1200, 1);
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pmic_write_reg(I2CPWR_BUS, TI65913_LDO5_CTRL,
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TI65913_MODE_ACTIVE_ON, 1);
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/*
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* Enable VDD_LCD
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*
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* Use different GPIO based on board id
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*/
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switch (board_id()) {
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case BOARD_ID_PROTO_0:
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/* Select PMIC GPIO_6's primary function */
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pmic_read_reg(I2CPWR_BUS, TI65913_PAD2, &data);
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pmic_write_reg(I2CPWR_BUS, TI65913_PAD2,
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PAD2_GPIO_6_PRIMARY(data), 0);
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/* Set PMIC_GPIO_6 as output */
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pmic_read_reg(I2CPWR_BUS, TI65913_GPIO_DATA_DIR, &data);
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pmic_write_reg(I2CPWR_BUS, TI65913_GPIO_DATA_DIR,
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TI65913_GPIO_6_OUTPUT, 0);
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/* Set PMIC_GPIO_6 output high */
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pmic_read_reg(I2CPWR_BUS, TI65913_GPIO_DATA_OUT, &data);
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pmic_write_reg(I2CPWR_BUS, TI65913_GPIO_DATA_OUT,
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TI65913_GPIO_6_HIGH, 1);
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break;
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case BOARD_ID_PROTO_1:
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case BOARD_ID_PROTO_3:
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case BOARD_ID_PROTO_4:
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case BOARD_ID_EVT:
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gpio_set(EN_VDD_LCD, 1);
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break;
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default: /* unknown board */
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return -1;
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}
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/* wait for 2ms */
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mdelay(2);
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/* Enable PP1800_LCDIO to panel */
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gpio_set(EN_VDD18_LCD, 1);
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/* wait for 1ms */
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mdelay(1);
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/* Set panel EN and RST signals */
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gpio_set(LCD_EN, 1); /* enable */
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/* wait for min 10ms */
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mdelay(10);
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gpio_set(LCD_RST_L, 1); /* clear reset */
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/* wait for min 3ms */
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mdelay(3);
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return 0;
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}
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static const struct pad_config i2s1_pad[] = {
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/* I2S1 */
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PAD_CFG_SFIO(DAP2_SCLK, PINMUX_INPUT_ENABLE, I2S1),
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PAD_CFG_SFIO(DAP2_FS, PINMUX_INPUT_ENABLE, I2S1),
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PAD_CFG_SFIO(DAP2_DOUT, PINMUX_INPUT_ENABLE, I2S1),
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PAD_CFG_SFIO(DAP2_DIN, PINMUX_INPUT_ENABLE | PINMUX_TRISTATE, I2S1),
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/* codec MCLK via EXTPERIPH1 */
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PAD_CFG_SFIO(DAP_MCLK1, PINMUX_PULL_NONE, EXTPERIPH1),
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};
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static const struct funit_cfg audio_funit[] = {
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/* We need 1.5MHz for I2S1. So we use CLK_M */
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FUNIT_CFG(I2S1, CLK_M, 1500, i2s1_pad, ARRAY_SIZE(i2s1_pad)),
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};
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static int configure_display_blocks(void)
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{
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/* set and enable panel related vdd */
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if (enable_lcd_vdd())
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return -1;
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/* enable display related clocks */
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configure_display_clocks();
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return 0;
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}
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/* Audio init: clocks and enables/resets */
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static void setup_audio(void)
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{
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/*
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* External peripheral 1: audio codec (RT5677) uses 12MHz CLK1
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* NOTE: We can't use a funits struct/call here because EXTPERIPH1/2/3
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* don't have BASE regs or CAR RST/ENA bits. Also, the mux setting for
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* EXTPERIPH1/DAP_MCLK1 is rolled into the I2S1 padcfg.
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*/
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clock_configure_source(extperiph1, CLK_M, 12000);
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soc_configure_funits(audio_funit, ARRAY_SIZE(audio_funit));
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clock_external_output(1); /* For external RT5677 audio codec. */
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/*
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* Confirmed by NVIDIA hardware team, we need to take ALL audio devices
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* connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out
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* of reset and clock-enabled, otherwise reading AHUB devices (in our
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* case, I2S/APBIF/AUDIO<XBAR>) will hang.
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*/
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clock_enable_audio();
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}
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#define AD4567_DEV 0x34
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#define PWR_CTL 0
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#define DAC_CTL 2
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#define SPWDN (1 << 0)
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#define DAC_MUTE (1 << 6)
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#define DAC_FS (0x7 << 0)
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#define SR_32K_48KHZ 0x2
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static void enable_ad4567_spkr_amp(void)
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{
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uint8_t reg_byte;
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if (board_id() >= BOARD_ID_PROTO_3)
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return;
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/*
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* I2C6, device 0x34 is an AD4567 speaker amp on P0/P1.
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* It needs to have a couple of regs tweaked to turn it on
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* so it can provide audio output to the mono speaker on P0/P1.
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*/
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i2c_readb(I2C6_BUS, AD4567_DEV, PWR_CTL, ®_byte);
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reg_byte &= ~SPWDN; // power up amp
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i2c_writeb(I2C6_BUS, AD4567_DEV, PWR_CTL, reg_byte);
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/* The next 2 settings are defaults, but set them anyway */
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i2c_readb(I2C6_BUS, AD4567_DEV, DAC_CTL, ®_byte);
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reg_byte &= ~DAC_MUTE; // unmute DAC (default)
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reg_byte &= ~DAC_FS; // mask sample rate bits
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reg_byte |= SR_32K_48KHZ; // set 32K-48KHz sample rate (default)
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i2c_writeb(I2C6_BUS, AD4567_DEV, DAC_CTL, reg_byte);
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}
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static void mainboard_init(device_t dev)
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{
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soc_configure_funits(funits, ARRAY_SIZE(funits));
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/* I2C6 bus (audio, etc.) */
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soc_configure_i2c6pad();
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i2c_init(I2C6_BUS);
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setup_audio();
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/* Temp hack for P1 board: Enable speaker amp (powerup, etc.) */
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enable_ad4567_spkr_amp();
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elog_init();
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elog_add_boot_reason();
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fix_ec_sw_sync();
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/* configure panel gpio pads */
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soc_configure_pads(lcd_gpio_padcfgs, ARRAY_SIZE(lcd_gpio_padcfgs));
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/* if panel needs to bringup */
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if (display_init_required())
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configure_display_blocks();
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}
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void display_startup(device_t dev)
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{
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dsi_display_startup(dev);
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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}
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struct chip_operations mainboard_ops = {
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.name = "rush_ryu",
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.enable_dev = mainboard_enable,
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};
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#if IS_ENABLED(CONFIG_CHROMEOS)
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void lb_board(struct lb_header *header)
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{
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lb_table_add_serialno_from_vpd(header);
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}
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#endif
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