Files
system76-coreboot/src/superio/winbond/w83627thf/superio.c
Stefan Reinauer 2b34db8d1d coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3
a long time ago. This will make it easier to port v2 boards forward to v3 at
some point (and other things)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-28 20:10:20 +00:00

112 lines
3.1 KiB
C

/* Copyright 2000 AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* Copyright 2004 Tyan
By LYH change from PC87360 */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
#include <string.h>
#include <bitops.h>
#include <uart8250.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include "chip.h"
#include "w83627thf.h"
static void w83627thf_enter_ext_func_mode(device_t dev)
{
outb(0x87, dev->path.pnp.port);
outb(0x87, dev->path.pnp.port);
}
static void w83627thf_exit_ext_func_mode(device_t dev)
{
outb(0xaa, dev->path.pnp.port);
}
static void w83627thf_init(device_t dev)
{
struct superio_winbond_w83627thf_config *conf;
struct resource *res0, *res1;
/* Wishlist handle well known programming interfaces more
* generically.
*/
if (!dev->enabled) {
return;
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83627THF_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
case W83627THF_SP2:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com2);
break;
case W83627THF_KBC:
res0 = find_resource(dev, PNP_IDX_IO0);
res1 = find_resource(dev, PNP_IDX_IO1);
init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
break;
}
}
static void w83627thf_set_resources(device_t dev)
{
w83627thf_enter_ext_func_mode(dev);
pnp_set_resources(dev);
w83627thf_exit_ext_func_mode(dev);
}
static void w83627thf_enable_resources(device_t dev)
{
w83627thf_enter_ext_func_mode(dev);
pnp_enable_resources(dev);
w83627thf_exit_ext_func_mode(dev);
}
static void w83627thf_enable(device_t dev)
{
w83627thf_enter_ext_func_mode(dev);
pnp_enable(dev);
w83627thf_exit_ext_func_mode(dev);
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = w83627thf_set_resources,
.enable_resources = w83627thf_enable_resources,
.enable = w83627thf_enable,
.init = w83627thf_init,
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627THF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627THF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627THF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627THF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
// No 4 { 0,},
{ &ops, W83627THF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627THF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
// { W83627THF_GPIO2,},
// { W83627THF_GPIO3,},
{ &ops, W83627THF_ACPI, PNP_IRQ0, },
{ &ops, W83627THF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
};
static void enable_dev(device_t dev)
{
pnp_enable_devices(dev, &ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627thf_ops = {
CHIP_NAME("Winbond W83627THF Super I/O")
.enable_dev = enable_dev,
};