2b962a3c39
DIMM_SUPPORT APIC_ID_OFFSET ACPI_SSDTX_NUM IRQ_SLOT_COUNT MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID (except msi/ms9185) MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID MEM_TRAIN_SEQ HAVE_ACPI_RESUME Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC (which we deliberately differ in kconfig) from compareboard report. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
131 lines
2.4 KiB
Plaintext
131 lines
2.4 KiB
Plaintext
config BOARD_AMD_SERENGETI_CHEETAH
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bool "Serengeti Cheetah"
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select ARCH_X86
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select CPU_AMD_SOCKET_F
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_AMD_AMD8111
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select SOUTHBRIDGE_AMD_AMD8131
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select SUPERIO_WINBOND_W83627HF
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select USE_PRINTK_IN_CAR
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select LIFT_BSP_APIC_ID
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select AP_CODE_IN_CAR
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select WAIT_BEFORE_CPUS_INIT
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_512
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config MAINBOARD_DIR
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string
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default amd/serengeti_cheetah
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config DCACHE_RAM_BASE
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hex
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default 0xc8000
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config DCACHE_RAM_SIZE
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hex
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default 0x08000
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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default 0x01000
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config APIC_ID_OFFSET
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hex
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default 0x8
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config LB_CKS_RANGE_END
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int
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default 122
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config LB_CKS_LOC
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int
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default 123
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config MAINBOARD_PART_NUMBER
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string
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default "Serengeti Cheetah"
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config MAX_CPUS
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int
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default 8
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config MAX_PHYSICAL_CPUS
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int
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default 4
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config MEM_TRAIN_SEQ
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int
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default 1
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config SB_HT_CHAIN_ON_BUS0
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int
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default 2
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x6
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config HT_CHAIN_UNITID_BASE
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hex
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default 0xa
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config USE_INIT
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bool
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default n
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config SERIAL_CPU_INIT
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bool
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default n
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config IRQ_SLOT_COUNT
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int
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default 11
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1022
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x2b80
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depends on BOARD_AMD_SERENGETI_CHEETAH
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config ACPI_SSDTX_NUM
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int
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default 1
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depends on BOARD_AMD_SERENGETI_CHEETAH
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