2c018fba95
- SMP cleanups (remove SMP only use CONFIG_SMP) - Minor tweaks to romcc to keep it from taking forever compiling - failover fixes - Get a good implementation of k8_cpufixup and sizeram for the opteron git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
38 lines
1.0 KiB
C
38 lines
1.0 KiB
C
#ifndef CPU_K8_MTRR_H
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#define CPU_K8_MTRR_H
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#include <cpu/p6/mtrr.h>
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#define IORR_FIRST 0xC0010016
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#define IORR_LAST 0xC0010019
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#define SYSCFG 0xC0010010
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#define MTRR_READ_MEM (1 << 4)
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#define MTRR_WRITE_MEM (1 << 3)
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#define SYSCFG_MSR 0xC0010010
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#define SYSCFG_MSR_TOM2En (1 << 21)
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#define SYSCFG_MSR_MtrrVarDramEn (1 << 20)
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#define SYSCFG_MSR_MtrrFixDramModEn (1 << 19)
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#define SYSCFG_MSR_MtrrFixDramEn (1 << 18)
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#define SYSCFG_MSR_UcLockEn (1 << 17)
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#define SYSCFG_MSR_ChxToDirtyDis (1 << 16)
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#define SYSCFG_MSR_ClVicBlkEn (1 << 11)
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#define SYSCFG_MSR_SetDirtyEnO (1 << 10)
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#define SYSCFG_MSR_SetDirtyEnS (1 << 9)
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#define SYSCFG_MSR_SetDirtyEnE (1 << 8)
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#define SYSCFG_MSR_SysVicLimitMask ((1 << 8) - (1 << 5))
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#define SYSCFG_MSR_SysAckLimitMask ((1 << 5) - (1 << 0))
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#define IORR0_BASE 0xC0010016
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#define IORR0_MASK 0xC0010017
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#define IORR1_BASE 0xC0010018
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#define IORR1_MASK 0xC0010019
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#define TOP_MEM 0xC001001A
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#define TOP_MEM2 0xC001001D
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#define HWCR_MSR 0xC0010015
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#endif /* CPU_K8_MTRR_H */
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