2c3662710a
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
124 lines
3.2 KiB
C
124 lines
3.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 coresystems GmbH
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* Copyright (C) 2010 Rudolf Marek
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <arch/io.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/amd/model_fxx_msr.h>
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#include <cpu/x86/cache.h>
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#include <cpu/x86/smm.h>
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#include <string.h>
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#define SMM_BASE_MSR 0xc0010111
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#define SMM_ADDR_MSR 0xc0010112
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#define SMM_MASK_MSR 0xc0010113
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#define SMM_BASE 0xa0000
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extern unsigned char _binary_smm_start;
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extern unsigned char _binary_smm_size;
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static int smm_handler_copied = 0;
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void smm_init(void)
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{
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msr_t msr;
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msr = rdmsr(HWCR_MSR);
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if (msr.lo & (1 << 0)) {
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// This sounds like a bug... ?
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printk(BIOS_DEBUG, "SMM is still locked from last boot, using old handler.\n");
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return;
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}
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/* Only copy SMM handler once, not once per CPU */
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if (!smm_handler_copied) {
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msr_t syscfg_orig, mtrr_aseg_orig;
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smm_handler_copied = 1;
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/* Back up MSRs for later restore */
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syscfg_orig = rdmsr(SYSCFG_MSR);
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mtrr_aseg_orig = rdmsr(MTRRfix16K_A0000_MSR);
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/* MTRR changes don't like an enabled cache */
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disable_cache();
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msr = syscfg_orig;
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/* Allow changes to MTRR extended attributes */
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msr.lo |= SYSCFG_MSR_MtrrFixDramModEn;
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/* turn the extended attributes off until we fix
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* them so A0000 is routed to memory
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*/
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msr.lo &= ~SYSCFG_MSR_MtrrFixDramEn;
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wrmsr(SYSCFG_MSR, msr);
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/* set DRAM access to 0xa0000 */
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/* A0000 is memory */
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msr.lo = 0x18181818;
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msr.hi = 0x18181818;
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wrmsr(MTRRfix16K_A0000_MSR, msr);
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/* enable the extended features */
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msr = syscfg_orig;
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msr.lo |= SYSCFG_MSR_MtrrFixDramModEn;
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msr.lo |= SYSCFG_MSR_MtrrFixDramEn;
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wrmsr(SYSCFG_MSR, msr);
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enable_cache();
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/* copy the real SMM handler */
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memcpy((void *)SMM_BASE, &_binary_smm_start, (size_t)&_binary_smm_size);
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wbinvd();
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/* Restore MTRR */
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disable_cache();
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/* Restore SYSCFG */
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wrmsr(SYSCFG_MSR, syscfg_orig);
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wrmsr(MTRRfix16K_A0000_MSR, mtrr_aseg_orig);
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enable_cache();
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}
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/* But set SMM base address on all CPUs/cores */
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msr = rdmsr(SMM_BASE_MSR);
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msr.lo = SMM_BASE - (lapicid() * 0x400);
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wrmsr(SMM_BASE_MSR, msr);
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/* enable the SMM memory window */
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msr = rdmsr(SMM_MASK_MSR);
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msr.lo |= (1 << 0); // Enable ASEG SMRAM Range
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wrmsr(SMM_MASK_MSR, msr);
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/* Set SMMLOCK to avoid exploits messing with SMM */
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msr = rdmsr(HWCR_MSR);
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msr.lo |= (1 << 0);
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wrmsr(HWCR_MSR, msr);
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}
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void smm_lock(void)
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{
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/* We lock SMM per CPU core */
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}
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