2d85fbed16
Neither does quadcore.h (anymore) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5429 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
325 lines
7.6 KiB
C
325 lines
7.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Generic FAM10 debug code, used by mainboard specific romstage.c
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*/
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#include "amdfam10_pci.c"
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static inline void print_debug_addr(const char *str, void *val)
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{
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#if CACHE_AS_RAM_ADDRESS_DEBUG == 1
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printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val);
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#endif
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}
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static void print_debug_pci_dev(u32 dev)
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{
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#if CONFIG_PCI_BUS_SEGN_BITS==0
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printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7);
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#else
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printk(BIOS_DEBUG, "PCI: %04x:%02x:%02x.%02x", (dev>>28) & 0x0f, (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7);
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#endif
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}
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static inline void print_pci_devices(void)
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{
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device_t dev;
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for(dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0xff, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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u32 id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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print_debug_pci_dev(dev);
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printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16));
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if(((dev>>12) & 0x07) == 0) {
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u8 hdr_type;
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hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
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if((hdr_type & 0x80) != 0x80) {
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dev += PCI_DEV(0,0,7);
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}
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}
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}
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}
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static inline void print_pci_devices_on_bus(u32 busn)
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{
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device_t dev;
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for(dev = PCI_DEV(busn, 0, 0);
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dev <= PCI_DEV(busn, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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u32 id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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print_debug_pci_dev(dev);
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printk(BIOS_DEBUG, " %04x:%04x\n", (id & 0xffff), (id>>16));
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if(((dev>>12) & 0x07) == 0) {
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u8 hdr_type;
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hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
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if((hdr_type & 0x80) != 0x80) {
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dev += PCI_DEV(0,0,7);
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}
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}
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}
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}
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static void dump_pci_device_range(u32 dev, u32 start_reg, u32 size)
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{
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int i;
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print_debug_pci_dev(dev);
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int j;
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int end = start_reg + size;
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for(i = start_reg; i < end; i+=4) {
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u32 val;
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if ((i & 0x0f) == 0) {
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printk(BIOS_DEBUG, "\n%04x:",i);
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}
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val = pci_read_config32(dev, i);
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for(j=0;j<4;j++) {
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printk(BIOS_DEBUG, " %02x", val & 0xff);
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val >>= 8;
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}
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}
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print_debug("\n");
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}
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static void dump_pci_device(u32 dev)
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{
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dump_pci_device_range(dev, 0, 4096);
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}
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static void dump_pci_device_index_wait_range(u32 dev, u32 index_reg, u32 start,
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u32 size)
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{
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int i;
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int end = start + size;
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print_debug_pci_dev(dev);
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print_debug(" -- index_reg="); print_debug_hex32(index_reg);
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for(i = start; i < end; i++) {
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u32 val;
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int j;
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printk(BIOS_DEBUG, "\n%02x:",i);
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val = pci_read_config32_index_wait(dev, index_reg, i);
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for(j=0;j<4;j++) {
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printk(BIOS_DEBUG, " %02x", val & 0xff);
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val >>= 8;
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}
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}
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print_debug("\n");
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}
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static inline void dump_pci_device_index_wait(u32 dev, u32 index_reg)
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{
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dump_pci_device_index_wait_range(dev, index_reg, 0, 0x54);
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dump_pci_device_index_wait_range(dev, index_reg, 0x100, 0x08); //DIMM1 when memclk > 400Hz
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// dump_pci_device_index_wait_range(dev, index_reg, 0x200, 0x08); //DIMM2
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// dump_pci_device_index_wait_range(dev, index_reg, 0x300, 0x08); //DIMM3
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}
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static inline void dump_pci_device_index(u32 dev, u32 index_reg, u32 type, u32 length)
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{
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int i;
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print_debug_pci_dev(dev);
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print_debug(" index reg: "); print_debug_hex16(index_reg); print_debug(" type: "); print_debug_hex8(type);
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type<<=28;
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for(i = 0; i < length; i++) {
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u32 val;
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if ((i & 0x0f) == 0) {
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printk(BIOS_DEBUG, "\n%02x:",i);
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}
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val = pci_read_config32_index(dev, index_reg, i|type);
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printk(BIOS_DEBUG, " %08x", val);
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}
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print_debug("\n");
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}
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static inline void dump_pci_devices(void)
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{
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device_t dev;
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for(dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0xff, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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u32 id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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dump_pci_device(dev);
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if(((dev>>12) & 0x07) == 0) {
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u8 hdr_type;
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hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
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if((hdr_type & 0x80) != 0x80) {
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dev += PCI_DEV(0,0,7);
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}
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}
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}
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}
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static inline void dump_pci_devices_on_bus(u32 busn)
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{
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device_t dev;
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for(dev = PCI_DEV(busn, 0, 0);
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dev <= PCI_DEV(busn, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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u32 id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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dump_pci_device(dev);
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if(((dev>>12) & 0x07) == 0) {
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u8 hdr_type;
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hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
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if((hdr_type & 0x80) != 0x80) {
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dev += PCI_DEV(0,0,7);
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}
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}
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}
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}
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#if CONFIG_DEBUG_SMBUS
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static void dump_spd_registers(const struct mem_controller *ctrl)
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{
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int i;
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print_debug("\n");
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for(i = 0; i < DIMM_SOCKETS; i++) {
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u32 device;
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device = ctrl->spd_addr[i];
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if (device) {
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int j;
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printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
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for(j = 0; j < 128; j++) {
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int status;
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u8 byte;
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if ((j & 0xf) == 0) {
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printk(BIOS_DEBUG, "\n%02x: ", j);
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}
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status = smbus_read_byte(device, j);
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if (status < 0) {
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break;
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}
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byte = status & 0xff;
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printk(BIOS_DEBUG, "%02x ", byte);
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}
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print_debug("\n");
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}
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device = ctrl->spd_addr[i+DIMM_SOCKETS];
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if (device) {
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int j;
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printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
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for(j = 0; j < 128; j++) {
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int status;
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u8 byte;
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if ((j & 0xf) == 0) {
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printk(BIOS_DEBUG, "\n%02x: ", j);
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}
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status = smbus_read_byte(device, j);
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if (status < 0) {
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break;
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}
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byte = status & 0xff;
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printk(BIOS_DEBUG, "%02x ", byte);
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}
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print_debug("\n");
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}
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}
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}
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static void dump_smbus_registers(void)
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{
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u32 device;
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print_debug("\n");
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for(device = 1; device < 0x80; device++) {
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int j;
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if( smbus_read_byte(device, 0) < 0 ) continue;
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printk(BIOS_DEBUG, "smbus: %02x", device);
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for(j = 0; j < 256; j++) {
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int status;
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u8 byte;
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status = smbus_read_byte(device, j);
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if (status < 0) {
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break;
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}
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if ((j & 0xf) == 0) {
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printk(BIOS_DEBUG, "\n%02x: ",j);
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}
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byte = status & 0xff;
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printk(BIOS_DEBUG, "%02x ", byte);
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}
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print_debug("\n");
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}
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}
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#endif
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static inline void dump_io_resources(u32 port)
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{
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int i;
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udelay(2000);
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printk(BIOS_DEBUG, "%04x:\n", port);
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for(i=0;i<256;i++) {
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u8 val;
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if ((i & 0x0f) == 0) {
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printk(BIOS_DEBUG, "%02x:", i);
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}
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val = inb(port);
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printk(BIOS_DEBUG, " %02x",val);
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if ((i & 0x0f) == 0x0f) {
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print_debug("\n");
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}
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port++;
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}
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}
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static inline void dump_mem(u32 start, u32 end)
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{
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u32 i;
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print_debug("dump_mem:");
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for(i=start;i<end;i++) {
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if((i & 0xf)==0) {
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printk(BIOS_DEBUG, "\n%08x:", i);
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}
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printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i));
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}
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print_debug("\n");
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}
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