2e08b59cdc
Since it checks for DDR3 style checksums, it's a more appropriate name. Also make its configuration local for a future code move. Change-Id: I417ae165579618d9215b8ca5f0500ff9a61af42f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/18264 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
27 lines
800 B
C
27 lines
800 B
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _SPD_CACHE_H_
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#define _SPD_CACHE_H_
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#include <stdint.h>
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#if IS_ENABLED(CONFIG_SPD_CACHE)
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int read_ddr3_spd_from_cbfs(u8 *buf, int idx);
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#else
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static inline int read_ddr3_spd_from_cbfs(u8 *buf, int idx) { return -1; }
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#endif
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#endif
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