6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
125 lines
3.1 KiB
C
125 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/io.h>
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#include <boot/coreboot_tables.h>
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#include <console/uart.h>
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#include <trace.h>
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#include "uart8250reg.h"
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/* Should support 8250, 16450, 16550, 16550A type UARTs */
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/* Expected character delay at 1200bps is 9ms for a working UART
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* and no flow-control. Assume UART as stuck if shift register
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* or FIFO takes more than 50ms per character to appear empty.
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*
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* Estimated that inb() from UART takes 1 microsecond.
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*/
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#define SINGLE_CHAR_TIMEOUT (50 * 1000)
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#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
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static int uart8250_can_tx_byte(unsigned int base_port)
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{
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return inb(base_port + UART8250_LSR) & UART8250_LSR_THRE;
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}
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static void uart8250_tx_byte(unsigned int base_port, unsigned char data)
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{
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unsigned long int i = SINGLE_CHAR_TIMEOUT;
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while (i-- && !uart8250_can_tx_byte(base_port));
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outb(data, base_port + UART8250_TBR);
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}
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static void uart8250_tx_flush(unsigned int base_port)
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{
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unsigned long int i = FIFO_TIMEOUT;
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while (i-- && !(inb(base_port + UART8250_LSR) & UART8250_LSR_TEMT));
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}
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static int uart8250_can_rx_byte(unsigned int base_port)
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{
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return inb(base_port + UART8250_LSR) & UART8250_LSR_DR;
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}
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static unsigned char uart8250_rx_byte(unsigned int base_port)
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{
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unsigned long int i = SINGLE_CHAR_TIMEOUT;
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while (i && !uart8250_can_rx_byte(base_port))
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i--;
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if (i)
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return inb(base_port + UART8250_RBR);
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else
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return 0x0;
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}
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static void uart8250_init(unsigned int base_port, unsigned int divisor)
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{
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DISABLE_TRACE;
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/* Disable interrupts */
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outb(0x0, base_port + UART8250_IER);
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/* Enable FIFOs */
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outb(UART8250_FCR_FIFO_EN, base_port + UART8250_FCR);
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/* assert DTR and RTS so the other end is happy */
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outb(UART8250_MCR_DTR | UART8250_MCR_RTS, base_port + UART8250_MCR);
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/* DLAB on */
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outb(UART8250_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART8250_LCR);
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/* Set Baud Rate Divisor. 12 ==> 9600 Baud */
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outb(divisor & 0xFF, base_port + UART8250_DLL);
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outb((divisor >> 8) & 0xFF, base_port + UART8250_DLM);
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/* Set to 3 for 8N1 */
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outb(CONFIG_TTYS0_LCS, base_port + UART8250_LCR);
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ENABLE_TRACE;
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}
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static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
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uintptr_t uart_platform_base(int idx)
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{
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if (idx < ARRAY_SIZE(bases))
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return bases[idx];
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return 0;
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}
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void uart_init(int idx)
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{
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if (!CONFIG(DRIVERS_UART_8250IO_SKIP_INIT)) {
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unsigned int div;
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div = uart_baudrate_divisor(get_uart_baudrate(),
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uart_platform_refclk(), uart_input_clock_divider());
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uart8250_init(uart_platform_base(idx), div);
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}
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}
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void uart_tx_byte(int idx, unsigned char data)
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{
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uart8250_tx_byte(uart_platform_base(idx), data);
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}
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unsigned char uart_rx_byte(int idx)
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{
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return uart8250_rx_byte(uart_platform_base(idx));
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}
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void uart_tx_flush(int idx)
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{
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uart8250_tx_flush(uart_platform_base(idx));
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}
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void uart_fill_lb(void *data)
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{
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struct lb_serial serial;
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serial.type = LB_SERIAL_TYPE_IO_MAPPED;
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serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
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serial.baud = get_uart_baudrate();
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serial.regwidth = 1;
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serial.input_hertz = uart_platform_refclk();
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serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
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lb_add_serial(&serial, data);
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lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
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}
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