Some boards need to override which IRQ the i8042 keyboard controller has its interrupt on instead of the default IRQ#1. The SIO_EC_PS2K_IRQ macro provides the mainboard an ability to override the interrupt location. BUG=chrome-os-partner:23965 BRANCH=None TEST=Built and booted rambi using this option. New IRQ is correctly picked up by kernel allowing keyboard support. Change-Id: Ic2b222018dfc3aa30e24a31009e832ae0fb7e9cf Reviewed-on: https://chromium-review.googlesource.com/177222 Tested-by: Bernie Thompson <bhthompson@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4978 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
178 lines
4.1 KiB
Plaintext
178 lines
4.1 KiB
Plaintext
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Chrome OS Embedded Controller interface
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*
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* Constants that should be defined:
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*
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* SIO_EC_MEMMAP_ENABLE : Enable EC LPC memory map resources
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* EC_LPC_ADDR_MEMMAP : Base address of memory map range
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* EC_MEMMAP_SIZE : Size of memory map range
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*
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* SIO_EC_HOST_ENABLE : Enable EC host command interface resources
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* EC_LPC_ADDR_HOST_DATA : EC host command interface data port
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* EC_LPC_ADDR_HOST_CMD : EC host command interface command port
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* EC_HOST_CMD_REGION0 : EC host command buffer
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* EC_HOST_CMD_REGION1 : EC host command buffer
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* EC_HOST_CMD_REGION_SIZE : EC host command buffer size
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*/
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// Scope is \_SB.PCI0.LPCB
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Device (SIO) {
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Name (_UID, 0)
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Name (_ADR, 0)
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#ifdef SIO_EC_MEMMAP_ENABLE
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Device (ECMM) {
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Name (_HID, EISAID ("PNP0C02"))
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Name (_UID, 1)
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Name (_ADR, 0)
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Method (_STA, 0, NotSerialized) {
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Return (0x0F)
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}
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Name (_CRS, ResourceTemplate ()
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{
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IO (Decode16, EC_LPC_ADDR_MEMMAP, EC_LPC_ADDR_MEMMAP,
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0x08, EC_MEMMAP_SIZE)
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})
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Name (_PRS, ResourceTemplate ()
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{
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IO (Decode16, EC_LPC_ADDR_MEMMAP, EC_LPC_ADDR_MEMMAP,
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0x08, EC_MEMMAP_SIZE)
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})
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}
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#endif
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#ifdef SIO_EC_HOST_ENABLE
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Device (ECUI) {
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Name (_HID, EISAID ("PNP0C02"))
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Name (_UID, 3)
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Name (_ADR, 0)
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Method (_STA, 0, NotSerialized) {
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Return (0x0F)
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}
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Name (_CRS, ResourceTemplate ()
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{
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IO (Decode16,
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EC_LPC_ADDR_HOST_DATA, EC_LPC_ADDR_HOST_DATA,
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0x01, 0x01)
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IO (Decode16,
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EC_LPC_ADDR_HOST_CMD, EC_LPC_ADDR_HOST_CMD,
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0x01, 0x01)
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IO (Decode16,
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EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION0, 0x08,
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EC_HOST_CMD_REGION_SIZE)
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IO (Decode16,
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EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION0, 0x08,
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EC_HOST_CMD_REGION_SIZE)
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})
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Name (_PRS, ResourceTemplate ()
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{
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StartDependentFn (0, 0) {
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IO (Decode16, EC_LPC_ADDR_HOST_DATA,
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EC_LPC_ADDR_HOST_DATA, 0x01, 0x01)
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IO (Decode16, EC_LPC_ADDR_HOST_CMD,
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EC_LPC_ADDR_HOST_CMD, 0x01, 0x01)
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IO (Decode16,
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EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION0,
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0x08, EC_HOST_CMD_REGION_SIZE)
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IO (Decode16,
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EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION1,
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0x08, EC_HOST_CMD_REGION_SIZE)
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}
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EndDependentFn ()
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})
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}
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#endif
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#ifdef SIO_EC_ENABLE_COM1
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Device (COM1) {
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Name (_HID, EISAID ("PNP0501"))
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Name (_UID, 1)
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Name (_ADR, 0)
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Method (_STA, 0, NotSerialized) {
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Return (0x0F)
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}
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Name (_CRS, ResourceTemplate ()
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{
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IO (Decode16, 0x03F8, 0x3F8, 0x08, 0x08)
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IRQNoFlags () {4}
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})
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Name (_PRS, ResourceTemplate ()
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{
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StartDependentFn (0, 0) {
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IO (Decode16, 0x03F8, 0x3F8, 0x08, 0x08)
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IRQNoFlags () {4}
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}
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EndDependentFn ()
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})
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}
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#endif
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#ifdef SIO_EC_ENABLE_PS2K
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Device (PS2K) // Keyboard
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{
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Name (_UID, 0)
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Name (_ADR, 0)
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Name (_HID, EISAID("PNP0303"))
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Name (_CID, EISAID("PNP030B"))
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Method (_STA, 0, NotSerialized) {
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Return (0x0F)
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}
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Name (_CRS, ResourceTemplate()
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{
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IO (Decode16, 0x60, 0x60, 0x01, 0x01)
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IO (Decode16, 0x64, 0x64, 0x01, 0x01)
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#ifdef SIO_EC_PS2K_IRQ
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SIO_EC_PS2K_IRQ
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#else
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IRQNoFlags () {1}
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#endif
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})
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Name (_PRS, ResourceTemplate()
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{
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StartDependentFn (0, 0) {
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IO (Decode16, 0x60, 0x60, 0x01, 0x01)
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IO (Decode16, 0x64, 0x64, 0x01, 0x01)
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#ifdef SIO_EC_PS2K_IRQ
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SIO_EC_PS2K_IRQ
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#else
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IRQNoFlags () {1}
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#endif
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}
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EndDependentFn ()
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})
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}
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#endif
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}
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