Change-Id: I6febf13ed54a7707f5a99d3d2715c36e18517c12 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34206 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
		
			
				
	
	
		
			162 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			162 lines
		
	
	
		
			5.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This file is part of the libpayload project.
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|  *
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|  * Copyright (C) 2008 Advanced Micro Devices, Inc.
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|  * Copyright (C) 2008 coresystems GmbH
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions
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|  * are met:
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|  * 1. Redistributions of source code must retain the above copyright
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|  *    notice, this list of conditions and the following disclaimer.
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|  * 2. Redistributions in binary form must reproduce the above copyright
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|  *    notice, this list of conditions and the following disclaimer in the
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|  *    documentation and/or other materials provided with the distribution.
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|  * 3. The name of the author may not be used to endorse or promote products
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|  *    derived from this software without specific prior written permission.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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|  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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|  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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|  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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|  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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|  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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|  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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|  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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|  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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|  * SUCH DAMAGE.
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|  */
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| 
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| #ifndef _ARCH_IO_H
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| #define _ARCH_IO_H
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| 
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| #include <inttypes.h>
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| 
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| /*
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|  * readb/w/l writeb/w/l are deprecated. use read8/16/32 and write8/16/32
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|  * instead for future development.
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|  *
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|  * TODO: make the existing code use read8/16/32 and write8/16/32 then remove
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|  * readb/w/l and writeb/w/l.
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|  */
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| 
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| #define readb(_a) (*(volatile const unsigned char *) (_a))
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| #define readw(_a) (*(volatile const unsigned short *) (_a))
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| #define readl(_a) (*(volatile const unsigned int *) (_a))
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| 
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| #define writeb(_v, _a) (*(volatile unsigned char *) (_a) = (_v))
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| #define writew(_v, _a) (*(volatile unsigned short *) (_a) = (_v))
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| #define writel(_v, _a) (*(volatile unsigned int *) (_a) = (_v))
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| 
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| static inline __attribute__((always_inline)) uint8_t read8(const volatile void *addr)
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| {
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| 	return *((volatile uint8_t *)(addr));
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| }
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| 
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| static inline __attribute__((always_inline)) uint16_t read16(const volatile void *addr)
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| {
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| 	return *((volatile uint16_t *)(addr));
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| }
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| 
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| static inline __attribute__((always_inline)) uint32_t read32(const volatile void *addr)
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| {
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| 	return *((volatile uint32_t *)(addr));
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| }
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| 
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| static inline __attribute__((always_inline)) uint64_t read64(const volatile void *addr)
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| {
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| 	return *((volatile uint64_t *)(addr));
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| }
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| 
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| static inline __attribute__((always_inline)) void write8(volatile void *addr, uint8_t value)
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| {
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| 	*((volatile uint8_t *)(addr)) = value;
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| }
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| 
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| static inline __attribute__((always_inline)) void write16(volatile void *addr, uint16_t value)
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| {
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| 	*((volatile uint16_t *)(addr)) = value;
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| }
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| 
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| static inline __attribute__((always_inline)) void write32(volatile void *addr, uint32_t value)
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| {
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| 	*((volatile uint32_t *)(addr)) = value;
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| }
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| 
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| static inline __attribute__((always_inline)) void write64(volatile void *addr, uint64_t value)
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| {
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| 	*((volatile uint64_t *)(addr)) = value;
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| }
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| 
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| static inline unsigned int inl(int port)
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| {
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| 	unsigned long val;
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| 	__asm__ __volatile__("inl %w1, %0" : "=a"(val) : "Nd"(port));
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| 	return val;
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| }
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| 
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| static inline unsigned short inw(int port)
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| {
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| 	unsigned short val;
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| 	__asm__ __volatile__("inw %w1, %w0" : "=a"(val) : "Nd"(port));
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| 	return val;
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| }
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| 
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| static inline unsigned char inb(int port)
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| {
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| 	unsigned char val;
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| 	__asm__ __volatile__("inb %w1, %b0" : "=a"(val) : "Nd"(port));
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| 	return val;
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| }
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| 
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| static inline void outl(unsigned int val, int port)
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| {
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| 	__asm__ __volatile__("outl %0, %w1" : : "a"(val), "Nd"(port));
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| }
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| 
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| static inline void outw(unsigned short val, int port)
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| {
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| 	__asm__ __volatile__("outw %w0, %w1" : : "a"(val), "Nd"(port));
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| }
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| 
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| static inline void outb(unsigned char val, int port)
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| {
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| 	__asm__ __volatile__("outb %b0, %w1" : : "a"(val), "Nd"(port));
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| }
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| 
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| static inline void outsl(int port, const void *addr, unsigned long count)
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| {
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| 	__asm__ __volatile__("rep; outsl" : "+S"(addr), "+c"(count) : "d"(port));
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| }
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| 
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| static inline void outsw(int port, const void *addr, unsigned long count)
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| {
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| 	__asm__ __volatile__("rep; outsw" : "+S"(addr), "+c"(count) : "d"(port));
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| }
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| 
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| static inline void outsb(int port, const void *addr, unsigned long count)
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| {
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| 	__asm__ __volatile__("rep; outsb" : "+S"(addr), "+c"(count) : "d"(port));
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| }
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| 
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| static inline void insl(int port, void *addr, unsigned long count)
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| {
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| 	__asm__ __volatile__("rep; insl" : "+D"(addr), "+c"(count) : "d"(port)
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| 			     : "memory");
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| }
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| 
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| static inline void insw(int port, void *addr, unsigned long count)
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| {
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| 	__asm__ __volatile__("rep; insw" : "+D"(addr), "+c"(count) : "d"(port)
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| 			     : "memory");
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| }
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| 
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| static inline void insb(int port, void *addr, unsigned long count)
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| {
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| 	__asm__ __volatile__("rep; insb" : "+D"(addr), "+c"(count) : "d"(port)
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| 			     : "memory");
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| }
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| 
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| #endif
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