31769d99da
Remove dependency of Haswell on cpu/intel/socket_rpga989 code, which is a carry-over from Sandy Bridge/Ivy Bridge and older coreboot conventions where features were structured around socket types. Add CPU-specific options to Kconfig and required subdirs to Makefile.inc which are curently included with socket_rpga989. TEST=successfully built and booted on google/panther Change-Id: Ic788e2928df107d11ea2d2eca7613490aaed395c Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: http://review.coreboot.org/10037 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
25 lines
703 B
Makefile
25 lines
703 B
Makefile
ramstage-y += haswell_init.c
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ramstage-y += tsc_freq.c
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romstage-y += romstage.c
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romstage-y += tsc_freq.c
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ramstage-y += acpi.c
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ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
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ramstage-$(CONFIG_MONOTONIC_TIMER_MSR) += monotonic_timer.c
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cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c
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smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
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smm-$(CONFIG_MONOTONIC_TIMER_MSR) += monotonic_timer.c
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cpu_incs += $(src)/cpu/intel/haswell/cache_as_ram.inc
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/mtrr
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subdirs-y += ../../x86/lapic
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subdirs-y += ../../x86/cache
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subdirs-y += ../../x86/smm
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subdirs-y += ../microcode
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subdirs-y += ../turbo
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