31769d99da
Remove dependency of Haswell on cpu/intel/socket_rpga989 code, which is a carry-over from Sandy Bridge/Ivy Bridge and older coreboot conventions where features were structured around socket types. Add CPU-specific options to Kconfig and required subdirs to Makefile.inc which are curently included with socket_rpga989. TEST=successfully built and booted on google/panther Change-Id: Ic788e2928df107d11ea2d2eca7613490aaed395c Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: http://review.coreboot.org/10037 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
53 lines
904 B
Plaintext
53 lines
904 B
Plaintext
if BOARD_GOOGLE_PANTHER
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select CPU_INTEL_HASWELL
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select NORTHBRIDGE_INTEL_HASWELL
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select SOUTHBRIDGE_INTEL_LYNXPOINT
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select INTEL_LYNXPOINT_LP
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select BOARD_ROMSIZE_KB_8192
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select SUPERIO_ITE_IT8772F
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select VIRTUAL_DEV_SWITCH
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select HAVE_ACPI_RESUME
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select MMCONF_SUPPORT
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select HAVE_SMI_HANDLER
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select MAINBOARD_HAS_CHROMEOS
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select EXTERNAL_MRC_BLOB
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select MONOTONIC_TIMER_MSR
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select INTEL_INT15
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select PHYSICAL_REC_SWITCH
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select CHROMEOS_VBNV_CMOS
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config MAINBOARD_DIR
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string
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default google/panther
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config MAINBOARD_PART_NUMBER
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string
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default "Panther"
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config MMCONF_BASE_ADDRESS
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hex
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default 0xf0000000
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config MAX_CPUS
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int
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default 8
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config VGA_BIOS_FILE
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string
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default "pci8086,0166.rom"
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config HAVE_IFD_BIN
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bool
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default n
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config HAVE_ME_BIN
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bool
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default n
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endif
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