Done with sed and God Lines. Only done for C-like code for now. Change-Id: I2fa3bad88bb5b068baa1cfc6bbcddaabb09da1c5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40053 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
62 lines
1.4 KiB
C
62 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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#ifndef CPU_X86_CACHE
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#define CPU_X86_CACHE
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#include <cpu/x86/cr.h>
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#define CR0_CacheDisable (CR0_CD)
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#define CR0_NoWriteThrough (CR0_NW)
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#if !defined(__ASSEMBLER__)
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static inline void wbinvd(void)
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{
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asm volatile ("wbinvd" ::: "memory");
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}
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static inline void invd(void)
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{
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asm volatile("invd" ::: "memory");
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}
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static inline void clflush(void *addr)
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{
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asm volatile ("clflush (%0)"::"r" (addr));
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}
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/* The following functions require the __always_inline due to AMD
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* function STOP_CAR_AND_CPU that disables cache as
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* RAM, the cache as RAM stack can no longer be used. Called
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* functions must be inlined to avoid stack usage. Also, the
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* compiler must keep local variables register based and not
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* allocated them from the stack. With gcc 4.5.0, some functions
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* declared as inline are not being inlined. This patch forces
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* these functions to always be inlined by adding the qualifier
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* __always_inline to their declaration.
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*/
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static __always_inline void enable_cache(void)
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{
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CRx_TYPE cr0;
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cr0 = read_cr0();
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cr0 &= ~(CR0_CD | CR0_NW);
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write_cr0(cr0);
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}
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static __always_inline void disable_cache(void)
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{
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/* Disable and write back the cache */
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CRx_TYPE cr0;
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cr0 = read_cr0();
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cr0 |= CR0_CD;
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wbinvd();
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write_cr0(cr0);
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wbinvd();
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}
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void x86_enable_cache(void);
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#endif /* !__ASSEMBLER__ */
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#endif /* CPU_X86_CACHE */
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