3322d33e08
Enlarge CONSOLE_CBMEM_BUFFER_SIZE from 128K (default) to 512K, so that more DRAM calibration logs can be stored in CBMEM console. BUG=b:181933863 TEST=emerge-asurada coreboot TEST="cbmem -c" shows the whole full calibration log BRANCH=none Change-Id: If82cbee5d2d5e97d98cbdaecda739d91a7cca0f8 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51275 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
62 lines
1.4 KiB
Plaintext
62 lines
1.4 KiB
Plaintext
## SPDX-License-Identifier: GPL-2.0-only
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# Umbrella option to be selected by variant boards.
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config BOARD_GOOGLE_ASURADA_COMMON
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def_bool n
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if BOARD_GOOGLE_ASURADA_COMMON
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config VBOOT
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select EC_GOOGLE_CHROMEEC_SWITCHES
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select VBOOT_VBNV_FLASH
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select RTC
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select SOC_MEDIATEK_MT8192
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select BOARD_ROMSIZE_KB_8192
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select MAINBOARD_HAS_CHROMEOS
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select CHROMEOS_USE_EC_WATCHDOG_FLAG if CHROMEOS
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select COMMON_CBFS_SPI_WRAPPER
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select SPI_FLASH
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select SPI_FLASH_INCLUDE_ALL_DRIVERS
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_BOARDID
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select EC_GOOGLE_CHROMEEC_SPI
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select MAINBOARD_HAS_SPI_TPM_CR50 if VBOOT
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select MAINBOARD_HAS_TPM2 if VBOOT
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select MAINBOARD_HAS_NATIVE_VGA_INIT
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select MAINBOARD_FORCE_NATIVE_VGA_INIT
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select HAVE_LINEAR_FRAMEBUFFER
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select DRIVER_ANALOGIX_ANX7625
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config MAINBOARD_DIR
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string
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default "google/asurada"
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config MAINBOARD_PART_NUMBER
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string
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default "Asurada" if BOARD_GOOGLE_ASURADA
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default "Hayato" if BOARD_GOOGLE_HAYATO
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default "Spherion" if BOARD_GOOGLE_SPHERION
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config DRIVER_TPM_SPI_BUS
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hex
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default 0x5
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# On MT8192 the SPI flash is actually using a SPI-NOR controller with its own bus.
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# The number here should be a virtual value as (SPI_BUS_NUMBER + 1).
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config BOOT_DEVICE_SPI_FLASH_BUS
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int
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default 9
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config EC_GOOGLE_CHROMEEC_SPI_BUS
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hex
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default 0x1
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config CONSOLE_CBMEM_BUFFER_SIZE
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hex
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default 0x80000
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endif
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