340e4b8090
This adds a common cbmem_top implementation to all coreboot target. In romstage a static variable will be used to cache the result of cbmem_top_romstage. In ramstage if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is set a global variable needs to be populated by the stage entry with the value passed via the calling arguments. if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is not set the same implementation as will be used as in romstage. Change-Id: Ie767542ee25483acc9a56785ce20a885e9a63098 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
70 lines
1.8 KiB
C
70 lines
1.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2004 Stefan Reinauer <stefan.reinauer@coreboot.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cbmem.h>
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#include <arch/io.h>
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#include <arch/romstage.h>
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#include "memory.h"
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#include "fw_cfg.h"
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#define CMOS_ADDR_PORT 0x70
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#define CMOS_DATA_PORT 0x71
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#define HIGH_RAM_ADDR 0x35
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#define LOW_RAM_ADDR 0x34
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#define HIGH_HIGHRAM_ADDR 0x5d
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#define MID_HIGHRAM_ADDR 0x5c
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#define LOW_HIGHRAM_ADDR 0x5b
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unsigned long qemu_get_high_memory_size(void)
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{
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unsigned long high;
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outb(HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high = ((unsigned long) inb(CMOS_DATA_PORT)) << 22;
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outb(MID_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
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outb(LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT);
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high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
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return high;
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}
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unsigned long qemu_get_memory_size(void)
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{
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unsigned long tomk;
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outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT);
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tomk = ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
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outb(LOW_RAM_ADDR, CMOS_ADDR_PORT);
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tomk |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
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tomk += 16 * 1024;
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return tomk;
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}
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void *cbmem_top_chipset(void)
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{
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uintptr_t top = 0;
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top = fw_cfg_tolud();
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if (!top)
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top = (uintptr_t)qemu_get_memory_size() * 1024;
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return (void *)top;
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}
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/* Nothing to do, MTRRs are no-op on QEMU. */
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void fill_postcar_frame(struct postcar_frame *pcf)
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{
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}
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