34b707ff63
Done with sed and God Lines. Only done for C-like code for now. Change-Id: If2b94a05ccbb3bead292713719fdc914d96dbd0f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40173 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
60 lines
1.4 KiB
C
60 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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#include <boardid.h>
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#include <console/console.h>
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#include <delay.h>
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#include <device/i2c_simple.h>
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#include <reset.h>
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#include <stdint.h>
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#include "pmic.h"
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enum {
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MAX77620_I2C_ADDR = 0x3c
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};
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struct max77620_init_reg {
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u8 reg;
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u8 val;
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u8 delay;
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};
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static void pmic_write_reg(unsigned int bus, uint8_t reg, uint8_t val, int delay)
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{
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if (i2c_writeb(bus, MAX77620_I2C_ADDR, reg, val)) {
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printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
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__func__, reg, val);
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/* Reset the board on any PMIC write error */
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board_reset();
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} else {
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if (delay)
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udelay(500);
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}
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}
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void pmic_init(unsigned int bus)
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{
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/* Setup/Enable GPIO5 - VDD_CPU_REG_EN */
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pmic_write_reg(bus, MAX77620_GPIO5_REG, 0x09, 1);
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/* Setup/Enable GPIO1 - VDD_HDMI_5V0_BST_EN -- ??? */
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pmic_write_reg(bus, MAX77620_GPIO1_REG, 0x09, 1);
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/* GPIO 0,1,5,6,7 = GPIO, 2,3,4 = alt mode */
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pmic_write_reg(bus, MAX77620_AME_GPIO, 0x1c, 1);
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/* Disable SD1 Remote Sense, Set SD1 for LPDDR4 to 1.125v? */
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pmic_write_reg(bus, MAX77620_CNFG2SD_REG, 0x04, 1);
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pmic_write_reg(bus, MAX77620_SD1_REG, 0x2a, 1);
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/* CNFG1_L2 = 0xF2 for 3.3v, enabled */
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pmic_write_reg(bus, MAX77620_CNFG1_L2_REG, 0xf2, 1);
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/* CNFG1_L1 = 0xCA for 1.05v, enabled */
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pmic_write_reg(bus, MAX77620_CNFG1_L1_REG, 0xca, 1);
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printk(BIOS_DEBUG, "PMIC init done\n");
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}
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