3613d05e24
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5724 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
131 lines
5.1 KiB
C
131 lines
5.1 KiB
C
#include <console/console.h>
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#include <arch/smp/mpspec.h>
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#include <device/pci.h>
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#include <string.h>
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#include <stdint.h>
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#include <cpu/amd/amdk8_sysconf.h>
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extern unsigned char bus_isa;
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extern unsigned char bus_8131_0;
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extern unsigned char bus_8131_1;
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extern unsigned char bus_8131_2;
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extern unsigned char bus_8111_0;
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extern unsigned char bus_8111_1;
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extern unsigned apicid_8111;
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extern unsigned apicid_8131_1;
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extern unsigned apicid_8131_2;
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extern unsigned sbdn3;
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static void *smp_write_config_table(void *v)
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{
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static const char sig[4] = "PCMP";
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static const char oem[8] = "COREBOOT";
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static const char productid[12] = "DL145G1 ";
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struct mp_config_table *mc;
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unsigned char bus_num;
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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memset(mc, 0, sizeof(*mc));
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memcpy(mc->mpc_signature, sig, sizeof(sig));
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mc->mpc_length = sizeof(*mc); /* initially just the header */
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mc->mpc_spec = 0x04;
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mc->mpc_checksum = 0; /* not yet computed */
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memcpy(mc->mpc_oem, oem, sizeof(oem));
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memcpy(mc->mpc_productid, productid, sizeof(productid));
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mc->mpc_oemptr = 0;
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mc->mpc_oemsize = 0;
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mc->mpc_entry_count = 0; /* No entries yet... */
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mc->mpc_lapic = LAPIC_ADDR;
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mc->mpe_length = 0;
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mc->mpe_checksum = 0;
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mc->reserved = 0;
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smp_write_processors(mc);
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get_bus_conf();
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/*Bus: Bus ID Type*/
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/* define bus and isa numbers */
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for(bus_num = 0; bus_num < bus_isa; bus_num++) {
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smp_write_bus(mc, bus_num, "PCI ");
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}
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smp_write_bus(mc, bus_isa, "ISA ");
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/*I/O APICs: APIC ID Version State Address*/
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smp_write_ioapic(mc, apicid_8111, 0x20, 0xfec00000);
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{
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device_t dev;
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struct resource *res;
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dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res) {
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smp_write_ioapic(mc, apicid_8131_1, 0x20, res->base);
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}
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}
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dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res) {
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smp_write_ioapic(mc, apicid_8131_2, 0x20, res->base);
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}
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}
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}
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mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
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//
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// The commented-out lines are auto-detected on my servers.
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//
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/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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// Integrated SMBus 2.0
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ( 0x4 <<2)|3, apicid_8111 , 0x15);
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// Integrated AMD AC97 Audio
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ( 0x4 <<2)|1, apicid_8111 , 0x11);
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ( 0x4 <<2)|2, apicid_8111 , 0x12);
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// Integrated AMD USB
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, ( 0x4 <<2)|0, apicid_8111 , 0x10);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, ( 0x0 <<2)|3, apicid_8111 , 0x13);
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// On board ATI Rage XL
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, ( 0x5 <<2)|0, apicid_8111 , 0x14);
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// On board Broadcom nics
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, ( 0x3 <<2)|0, apicid_8131_2, 0x03);
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, ( 0x3 <<2)|1, apicid_8131_2, 0x00);
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// On board LSI SCSI
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, ( 0x2 <<2)|0, apicid_8131_2, 0x02);
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// PCIX-133 Slot
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smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|0, apicid_8131_1, 0x01);
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|1, apicid_8131_1, 0x02);
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|2, apicid_8131_1, 0x03);
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//smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|3, apicid_8131_1, 0x04);
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/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
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smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
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smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
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/* There is no extension information... */
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/* Compute the checksums */
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mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
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mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
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printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
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mc, smp_next_mpe_entry(mc));
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return smp_next_mpe_entry(mc);
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}
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unsigned long write_smp_table(unsigned long addr)
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{
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void *v;
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v = smp_write_floating_table(addr);
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return (unsigned long)smp_write_config_table(v);
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}
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